PHY2

PHY2

PHY2

PHY2

2

PHY 8

PHY2

PHY2

PHY16

EN

200 MHz

Clock

Generator

100 MHz

CDCLVD 2108

CDCLVD2108

www.ti.com

SCAS905C – OCTOBER 2010 – REVISED DECEMBER 2010

Dual 1:8 Low Additive Jitter LVDS Buffer

Check for Samples: CDCLVD2108

1

FEATURES

DESCRIPTION

•

Dual 1:8 Differential Buffer

•

Low Additive Jitter <300 fs RMS in

The CDCLVD2108 clock buffer distributes two clock

inputs (IN0, IN1) to a total of 16 pairs of differential

10 kHz to 20 MHz

LVDS clock outputs (OUT0, OUT15). Each buffer

•

Low Within Bank Output Skew of 50 ps (Max)

block consists of one input and 8 LVDS outputs. The

•

Universal Inputs Accept LVDS, LVPECL,

inputs can either be LVDS, LVPECL, or LVCMOS.

LVCMOS

The CDCLVD2108 is specifically designed for driving

•

One Input Dedicated for Eight Outputs

50-

Ω transmission lines. In case of driving the inputs

•

Total of 16 LVDS Outputs, ANSI EIA/TIA-644A

in single ended mode, the appropriate bias voltage

Standard Compatible

(VAC_REF) should be applied to the unused negative

input pin.

•

Clock Frequency up to 800 MHz

Using the control pin (EN) outputs can be either

•

2.375–2.625V Device Power Supply

disabled or enabled. If the EN pin is left open all

•

LVDS Reference Voltage, VAC_REF, Available for

outputs are active, if switched to a logical '0' all

Capacitive Coupled Inputs

outputs are disabled (static logical 0), if switched to a

•

Industrial Temperature Range –40°C to 85°C

logical '1', OUT (8..15) are switched off and OUT

(0..7) are active. The part supports a fail safe

•

Packaged in 7mm × 7mm 48-Pin QFN (RGZ)

function. It incorporates an input hysteresis, which

•

ESD Protection Exceeds 3 kV HBM, 1 kV CDM

prevents random oscillation of the outputs in absence

of an input signal.

APPLICATIONS

The device operates in 2.5V supply environment and

•

Telecommunications/Networking

is characterized from –40°C to 85°C (ambient

•

Medical Imaging

temperature). The CDCLVD2108 is packaged in

•

Test and Measurement Equipment

small 48-pin, 7-mm x 7-mm QFN package.

•

Wireless Communications

•

General Purpose Clocking

Figure 1. Application Example

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Copyright © 2010, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.