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PCF8545ATT/A bảng dữ liệu(PDF) 15 Page - NXP Semiconductors

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Giải thích chi tiết về linh kiện  Universal LCD driver for multiplex rates up to 1:8
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PCF8545ATT/A bảng dữ liệu(HTML) 15 Page - NXP Semiconductors

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PCF8545
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 13 November 2013
15 of 72
NXP Semiconductors
PCF8545
Universal LCD driver for multiplex rates up to 1:8
When the internal oscillator is used, the intermediate frequency may be output on the
OSCCLK pin. Its frequency is given in Table 18.
[1]
Nominal frame frequency calculated for the default clock frequency of 230 kHz.
[2]
Default value.
8.1.8 Command: load-data-pointer
The load-data-pointer command defines the start address of the display RAM. The data
pointer is auto incremented after each RAM write. The size of the display RAM is
dependent on the current multiplex drive mode setting, see Table 19.
Table 18.
Frame frequency prescaler values for 230 kHz clock operation
FD[4:0]
Nominal LCD frame
frequency (Hz)[1]
Divide factor, q
Intermediate clock
frequency (Hz)
00000
59.9
80
2875
00001
70.5
68
3382
00010
79.9
60
3833
00011
90.4
53
4340
00100
99.8
48
4792
00101
108.9
44
5227
00110
119.8
40
5750
00111
129.5
37
6216
01000
140.9
34
6765
01001
149.7
32
7188
01010
159.7
30
7667
01011
171.1
28
8214
01100
177.5
27
8519
01101
191.7
25
9200
01110[2]
199.7
24
9583
01111
208.3
23
10000
10000
217.8
22
10455
10001
228.3
21
10952
10010
239.6
20
11500
10011
252.2
19
12105
10100
266.2
18
12778
10101
281.9
17
13529
10110
299.5
16
14375
10111 to 11111
not used



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