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CDCM1802 bảng dữ liệu(PDF) 1 Page - Texas Instruments |
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CDCM1802 bảng dữ liệu(HTML) 1 Page - Texas Instruments |
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1 / 30 page ![]() CDCM1802 S0 S1 EN REN = 60lQ RS1 = 0 RS0 = open Setting for Mode 4: EN = VDD/2 S1 = 0 S0 = 1 IN, IN Y0,Y0 250 MHz Y1 125 MHz 125 MHz Product Folder Order Now Technical Documents Tools & Software Support & Community An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. CDCM1802 SCAS759C – APRIL 2004 – REVISED JULY 2017 CDCM1802 Clock Buffer With Programmable Divider, LVPECL I/O + Additional LVCMOS Output 1 1 Features 1 • Distributes One Differential Clock Input to One LVPECL Differential Clock Output and One LVCMOS Single-Ended Output • Programmable Output Divider for Both LVPECL and LVCMOS Outputs • 1.6-ns Output Skew Between LVCMOS and LVPECL Transitions Minimizing Noise • 3.3-V Power Supply (2.5-V Functional) • Signaling Rate Up to 800-MHz LVPECL and 200-MHz LVCMOS • Differential Input Stage for Wide Common-Mode Range Also Provides VBB Bias Voltage Output for Single-Ended Input Signals • Receiver Input Threshold ±75 mV • 16-Pin VQFN Package (3.00 mm × 3.00 mm) 2 Applications • Networking and Data Communications • Medical Imaging • Portable Test and Measurement • High-end A/V 3 Description The CDCM1802 clock driver distributes one pair of differential clock input to one LVPECL differential clock output pair, Y0 and Y0, and one single-ended LVCMOS output, Y1. It is specifically designed for driving 50-Ω transmission lines. The LVCMOS output is delayed by 1.6 ns over the PECL output stage to minimize noise impact during signal transitions. The CDCM1802 has two control pins, S0 and S1, to select different output mode settings. The S[1:0] pins are 3-level inputs. Additionally, an enable pin EN is provided to disable or enable all outputs simultaneously. The CDCM1802 is characterized for operation from −40°C to 85°C. For single-ended driver applications, the CDCM1802 provides a VBB output pin that can be directly connected to the unused input as a common-mode voltage reference. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) CDCM1802 VQFN (16) 3.00 mm × 3.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Application Example |
Số phần tương tự - CDCM1802 |
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Mô tả tương tự - CDCM1802 |
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