| công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
|
CC2560BYFVT bảng dữ liệu(PDF) 7 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
CC2560BYFVT bảng dữ liệu(HTML) 7 Page - Texas Instruments |
|
7 / 54 page ![]() CC2560A NRND; CC2564 NRND 7 CC2560A, CC2560B, CC2564, CC2564B www.ti.com SWRS121E – JULY 2012 – REVISED JANUARY 2016 Submit Documentation Feedback Product Folder Links: CC2560A CC2560B CC2564 CC2564B Terminal Configuration and Functions Copyright © 2012–2016, Texas Instruments Incorporated (1) I = input; O = output; I/O = bidirectional (2) I/O Type: Digital I/O cells. HY = input hysteresis, current = typical output current 4.1 Pin Attributes Table 4-1 describes the pin attributes. Table 4-1. Pin Attributes NAME NO. PULL AT RESET DEF. DIR.(1) I/O Type(2) DESCRIPTION I/O Signals HCI_RX A26 PU I 8 mA HCI universal asynchronous receiver/transmitter (UART) data receive HCI_TX A33 PU O 8 mA HCI UART data transmit HCI_RTS A32 PU O 8 mA HCI UART request-to-send The host is allowed to send data when HCI_RTS is low. HCI_CTS A29 PU I 8 mA HCI UART clear-to-send The CC256x device is allowed to send data when HCI_CTS is low. AUD_FSYNC A35 PD I/O 4 mA pulse-code modulation (PCM) frame-sync signal Fail-safe AUD_CLK B32 PD I/O HY, 4 mA PCM clock Fail-safe AUD_IN B34 PD I 4 mA PCM data input Fail-safe AUD_OUT B33 PD O 4 mA PCM data output Fail-safe TX_DBG B24 PU O 2 mA TI internal debug messages. TI recommends leaving an internal test point. Clock Signals SLOW_CLK A25 I 32.768-kHz clock in Fail-safe XTALP/FREFP B4 I Fast clock in analog (sine wave) Output terminal of fast-clock crystal Fail-safe XTALM/FREFM A4 I Fast clock in digital (square wave) Input terminal of fast-clock crystal Fail-safe Analog Signals BT_RF B8 I/O Bluetooth RF I/O nSHUTD A6 PD I Shutdown input (active low) Power and Ground Signals VDD_IO A17, A34, A38, B18, B19, B21, B22, B25 I I/O power supply (1.8-V nominal) MLDO_IN B5 I Main LDO input Connect directly to battery MLDO_OUT A5, A9, B2, B7 I/O Main LDO output (1.8-V nominal) CL1.5_LDO_IN B6 I Power amplifier (PA) LDO input Connect directly to battery CL1.5_LDO_OUT A7 O PA LDO output DIG_LDO_OUT A2, A3, B15, B26, B27, B35, B36 O Digital LDO output QFN pin B26 or B27 must be shorted to other DIG_LDO_OUT pins on the PCB. SRAM_LDO_OUT B1 O SRAM LDO output DCO_LDO_OUT A12 O DCO LDO output ADC_PPA_LDO_OUT A8 O ADC/PPA LDO output |
|
Link URL |
| Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không? [ DONATE ] |
Alldatasheet là | Quảng cáo | Liên lạc với chúng tôi | Chính sách bảo mật | Liên kết đến bảng dữ liệu | Trao đổi link | Tìm kiếm theo nhà sản xuất All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |