2.3 V to 5.5 V

GND

OUT

VDD

CBP

RMUX

Input

Pin

CFILTER

TI Device

CSAMPLE

Reset

Sample

CMUX

Simplified Input Circuit of

SAR Analog-to-Digital Converter

RSS

RFILTER

11

TMP235, TMP236

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SBOS857E – SEPTEMBER 2017 – REVISED MAY 2019

Product Folder Links: TMP235 TMP236

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8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

8.1 Application Information

The features of the TMP235 make the series of devices designed for various general temperature-sensing

applications. The TMP235 and TMP236 devices can operate down to a 2.3-V and a 3.1-V supply with 9-µA

power consumption, respectively. As a result, the series is designed for battery-powered applications. The

TMP23x series is mounted in two surface mount technology packages (SC70 and SOT-23.)

8.2 Typical Application

8.2.1 Connection to an ADC

Figure 13. Suggested Connections to an ADC Input Stage

8.2.1.1 Design Requirements

See Figure 13 for suggested connections to an ADC input stage. Most CMOS-based ADCs have a sampled data

comparator input structure. When the ADC charges the sampling capacitor (CSAMPLE), the capacitor requires

instantaneous charge from the output of the analog source temperature sensor, such as the TMP23x. Therefore,

the output impedance of the temperature sensor can affect ADC performance. In most cases, adding an external

capacitor (CFILTER) mitigates design challenges. The TMP23x is specified and characterized with a 1000-pF

maximum capacitive load (CLOAD). Figure 13 shows CLOAD as the sum of CFILTER + CMUX + CSAMPLE. TI

recommends maximizing the CFILTER value while allowing for the maximum specified ADC input capacitance

(CMUX + CSAMPLE) to limit the total CLOAD at 1000 pF. In most cases, a 680-pF CFILTER provides a reasonable

allowance for ADC input capacitance to minimize ADC sampling error and reduce noise coupling. An optional

series resistor (RFILTER) and CFILTER provides additional low-pass filtering to reject system level noise. TI

recommends placing RFILTER and CFILTER as close as possible to the ADC input for optimal performance.

8.2.1.2 Detailed Design Procedure

Depending on the input characteristics of the ADC, an external CFILTER may be required. The value of CFILTER

depends on the size of the sampling capacitor (CSAMPLE) and the sampling frequency while observing a maximum

CLOAD of 1000 pF. The capacitor requirements can vary because the input stages of all ADCs are not identical.

Figure 13 shows a general ADC application as an example only.