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SN65MLVD206B bảng dữ liệu(PDF) 29 Page - Texas Instruments |
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SN65MLVD206B bảng dữ liệu(HTML) 29 Page - Texas Instruments |
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29 / 38 page ![]() Signal Trace Uninterrupted Ground Plane Signal Trace Uninterrupted Ground Plane Signal Via Ground Via 29 SN65MLVD206B www.ti.com SLLSEX9A – DECEMBER 2016 – REVISED FEBRUARY 2020 Product Folder Links: SN65MLVD206B Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated Layout Example (continued) This configuration lays out alternating signal traces on different layers; thus, the horizontal separation between traces can be less than 2 or 3 times the width of individual traces. To ensure continuity in the ground signal path, TI recommends having an adjacent ground via for every signal via, as shown in Figure 30. Note that vias create additional capacitance. For example, a typical via has a lumped capacitance effect of 1/2 pF to 1 pF in FR4. Figure 30. Ground Via Location (Side View) Short and low-impedance connection of the device ground pins to the PCB ground plane reduces ground bounce. Holes and cutouts in the ground planes can adversely affect current return paths if they create discontinuities that increase returning current loop areas. To minimize EMI problems, TI recommends avoiding discontinuities below a trace (for example, holes, slits, and so on) and keeping traces as short as possible. Zoning the board wisely by placing all similar functions in the same area, as opposed to mixing them together, helps reduce susceptibility issues. |
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