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PCM1802DB bảng dữ liệu(PDF) 23 Page - Texas Instruments |
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PCM1802DB bảng dữ liệu(HTML) 23 Page - Texas Instruments |
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23 / 35 page ![]() f − Frequency − kHz −140 −120 −100 −80 −60 −40 −20 0 0 5 10 15 20 Input Level = −0.5 dB Data Points = 8192 G015 c f RC 1 2 = p 23 PCM1802 www.ti.com SLES023D – DECEMBER 2001 – REVISED DECEMBER 2016 Product Folder Links: PCM1802 Submit Documentation Feedback Copyright © 2001–2016, Texas Instruments Incorporated Typical Application (continued) 8.2.1 Design Requirements For this design example, use the parameters listed in Table 10 as the input parameters. Table 10. Design Parameters PARAMETER VALUE Analog input voltage 0 VP–P to 3 VP–P Output PCM audio data System clock input frequency 2.048 MHz to 49.152 MHz Output sampling frequency 8 kHz to 96 kHz Power supply 3.3 V and 5 V 8.2.2 Detailed Design Procedure 8.2.2.1 Control Pins The FMT, MODE, OSR, and BYPASS control pins are controlled by tying up to VDD, down to GND, or driven with GPIO from the DSP or audio processor. 8.2.2.2 DSP or Audio Processor In this application a DSP or audio processor acts as the audio master, and the PCM1802 acts as the audio slave. This means the DSP or audio processor must be able to output audio clocks that the PCM1802 can use to process audio signals. 8.2.2.3 Input Filters For the analog input circuit an AC-coupling capacitor must be placed in series with the input. This removes the DC component of the input signal. An RC filter can also be implemented to filter out of band noise to reduce aliasing. Equation 1 calculates the cutoff frequency of the optional RC filter for the input. (1) 8.2.3 Application Curve Figure 29. Amplitude vs Frequency |
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