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CC2550-RTY1 bảng dữ liệu(PDF) 41 Page - Texas Instruments

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CC2550-RTY1 bảng dữ liệu(HTML) 41 Page - Texas Instruments

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CC2550
SWRS039B
Page 41 of 58
28.1
Configuration Register Details
0x01: IOCFG1 – GDO1 Output Pin Configuration
Bit
Field Name
Reset
R/W
Description
7
GDO_DS
0
R/W
Set high (1) or low (0) output drive strength on the
GDO pins.
6
GDO1_INV
0
R/W
Invert output, i.e. select active low (1) / high (0)
5:0
GDO1_CFG[5:0]
46 (0x2E)
R/W
Default is 3-state (see Table 22 on page 34)
0x02: IOCFG0 – GDO0 Output Pin Configuration
Bit
Field Name
Reset
R/W
Description
7
TEMP_SENSOR_ENABLE
0
R/W
Enable analog temperature sensor. Write 0 in all
other register bits when using temperature sensor.
Note: PTEST must be written to 0xBF to make the
on-chip temperature sensor available in the IDLE
state.
6
GDO0_INV
0
R/W
Invert output, i.e. select active low (1) / high (0)
5:0
GDO0_CFG[5:0]
63 (0x3F)
R/W
Default is CLK_XOSC/192 (see Table 22on page 34)
0x03: FIFOTHR – TX FIFO Threshold
Bit
Field Name
Reset
R/W
Description
7:4
Reserved
0 (0000)
R/W
Write 0 (0000) for compatibility with possible future
extensions
3:0
FIFO_THR[3:0]
7 (0111)
R/W
Set the threshold for the TX FIFO. The threshold is
exceeded when the number of bytes in the FIFO is equal to
or higher than the threshold value.
Setting
Bytes in TX FIFO
0 (0000)
61
1 (0001)
57
2 (0010)
53
3 (0011)
49
4 (0100)
45
5 (0101)
41
6 (0110)
37
7 (0111)
33
8 (1000)
29
9 (1001)
25
10 (1010)
21
11 (1011)
17
12 (1100)
13
13 (1101)
9
14 (1110)
5
15 (1111)
1



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