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AFE4403 bảng dữ liệu(PDF) 59 Page - Texas Instruments

tên linh kiện AFE4403
Giải thích chi tiết về linh kiện  AFE4404 Ultra-Small, Integrated AFE for Wearable, Optical, Heart-Rate Monitoring and Bio-Sensing
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AFE4403 bảng dữ liệu(HTML) 59 Page - Texas Instruments

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AFE4404
www.ti.com
SBAS689D – JUNE 2015 – REVISED DECEMBER 2016
Product Folder Links: AFE4404
Submit Documentation Feedback
Copyright © 2015–2016, Texas Instruments Incorporated
8.5.43 Register 31h (address = 31h) [reset = 0h]
Figure 80. Register 31h
23
22
21
20
19
18
17
16
0
0
0
0
0
0
0
0
W-0h
W-0h
W-0h
W-0h
W-0h
W-0h
W-0h
W-0h
15
14
13
12
11
10
9
8
0
0
0
0
0
PD_
DISCONNECT
0
0
W-0h
W-0h
W-0h
W-0h
W-0h
W-0h
W-0h
W-0h
7
6
5
4
3
2
1
0
0
0
ENABLE_
INPUT_
SHORT
0
0
CLKDIV_EXTMODE
W-0h
W-0h
R/W-0h
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 63. Register 31h Field Descriptions
Bit
Field
Type
Reset
Description
23-11
0
W
0h
Must write 0.
10
PD_DISCONNECT
W
0h
This bit disconnects the PD signals (INP, INM) from the TIA
inputs. When enabled, the current input to the TIA is determined
completely by the offset cancellation DAC current (I_OFFDAC).
Note that in this mode, the AFE no longer sets the bias for the
PD.
9-6
0
W
0h
Must write 0.
5
ENABLE_INPUT_SHORT
R/W
0h
INP, INN are shorted to VCM whenever the TIA is in power-
down.
4-3
0
W
0h
Must write 0.
2-0
CLKDIV_EXTMODE
R/W
0h
These bits are used to set the division ratio to allow flexible
clocking in external clock mode. For details, see Table 64.
Table 64. CLKDIV_EXTMODE Register Settings
CLKDIV_EXTMODE REGISTER SETTINGS
DIVISION RATIO
ALLOWED FREQUENCY RANGE OF
EXTERNAL CLOCK IN MHz
0
2
8-12
1
8
32-48
2
Do not use
Do not use
3
12
48-60
4
4
16-24
5
1
4-6
6
6
24-36
7
Do not use
Do not use



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