TDA7514 datasheet(67/74 Pages) STMICROELECTRONICS

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TDA7514

5.3.3

PLL

Tuning is achieved thanks to a high speed PLL for fast RDS operation. The VCO input (after the first di-

vider) is divided through a swallow counter-divider and compared to the divided 10.25 MHz reference fre-

quency (fully programmable divider).

In FM the absence of a locked condition can be detected in order to automatically enable the charge pump

current and loop filter bandwidth to increase in order to speed up the locking process. Automatic switch

back to a lower charge pump current and narrower loop filter bandwidth can also be forced by the lock

detector, thus achieving a slower but less noisy operation of the tuning loop. Both the high and the low

values of the charge pump current are programmable.

Two separate loop filters can be used for optimized AM and FM operation.

5.3.4

STEREO DECODER SECTION

The stereo decoder is crossed by both the AM and the FM signal. The AM signal is only low-pass filtered

and subjected to audio noise blanking if necessary; the FM MPX signal is stereo demodulated, low-pass

filtered and blanked against impulse noise if necessary.

5.4 FM MODE

5.4.1

INPUT STAGE

The FM stereo decoder input stage provides a high-input impedance buffering. The input impedance is

opened during the RDS AF update phase by software or external pin control (programmable function) in

order not to discharge the coupling capacitor placed between the tuner output and the stereo decoder in-

put, and so speed up the return to normal listening.

The audio noise blanker circuit is fed from the stereo decoder buffer output: when the input impedance is

open during RDS AF update, the noise blanker is still able to work for a short period of time before the

capacitance associated with the buffer input stage is discharged.

During RDS AF update the output of the buffer is muted to avoid letting transient signals leak through the

audio processor section.

An additional input series switch has been added to perform the stereo decoder auto zero function (see

also Audio Processor section). This switch must be opened before selecting the tuner as the audio source

in order to allow the stereo decoder internal filters to discharge before the offset measurement is per-

formed.

The input buffer in FM mode is followed by an 80 kHz low-pass filter to remove high frequency noise.

5.4.2

PLL

The buffered MPX signal is fed to a 19 kHz-centered band-pass filter and subsequently to a PLL used to

regenerate the 38 kHz carrier for stereo demodulation.

The PLL compares the pilot tone with the divided output frequency of an internal VCO running at 456 kHz,

locking its operating frequency and phase to that of the pilot tone. The PLL status can be stored during

the RDS AF update phase in order to speed up subsequent returning to normal listening conditions.

Since the VCO tuning range is small, the VCO needs being adjusted to a setting that ensures lock is

achieved when a pilot tone is present. On the current TDA7514 version it is necessary to perform this

alignment during the car-radio test phase, by injecting a 19 kHz tone into the stereo decoder and changing

the VCO programming until a lock condition is reached.

The presence of a stereo signal is detected in this block by measuring the peak value of the pilot tone and

comparing it with a programmable threshold. The resulting information can be read back via I2C bus (audio

processor/stereo decoder I2C read byte).

5.4.3

STEREO DEMODULATOR AND BLEND

The MPX signal is fed to the stereo demodulator where the L and R outputs are derived. In case of a stereo

transmission in weak field or bad reception conditions (see FM tuner quality section) a gradual transition

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