ST72321B datasheet(13/187 Pages) STMICROELECTRONICS

13 / 187 page

13/187

Notes:

1. In the interrupt input column, “eiX” defines the associated external interrupt vector. If the weak pull-up

column (wpu) is merged with the interrupt column (int), then the I/O configuration is pull-up interrupt input,

else the configuration is floating interrupt input.

2. In the open drain output column, “T” defines a true open drain I/O (P-Buffer and protection diode to VDD

are not implemented). See See “I/O PORTS” on page 46. and Section 12.8 I/O PORT PIN CHARACTER-

ISTICS for more details.

3. OSC1 and OSC2 pins connect a crystal/ceramic resonator, or an external source to the on-chip oscil-

lator; see Section 1 DESCRIPTION and Section 12.5 CLOCK AND TIMING CHARACTERISTICS for

more details.

4. On the chip, each I/O port may have up to 8 pads:

– Pads that are not bonded to external pins are forced by hardware in input pull-up configuration after re-

set. The configuration of these pads must be kept at reset state to avoid added current consumption.

Pull-up always activated on PE2 see limitation Section 15.1.8.

It is mandatory to connect all available VDD and VREF pins to the supply voltage and all VSS and VSSA

pins to ground.

VSS_1

Digital Ground Voltage

PA4 (HS)

I/O CT HS

Port A4

PA5 (HS)

I/O CT HS

Port A5

PA6 (HS)/SDAI

I/O CT HS

TPort A6

I2C Data 1)

PA7 (HS)/SCLI

I/O CT HS

TPort A7

I2C Clock 1)

VPP/ ICCSEL

Must be tied low. In flash program-

ming mode, this pin acts as the pro-

gramming voltage input VPP. See

Section 12.9.2 for more details. High

voltage must not be applied to ROM

devices

RESET

I/O CT

Top priority non maskable interrupt.

EVD

External voltage detector

TLI

Top level interrupt input pin

VSS_2

Digital Ground Voltage

OSC23)

I/O

Resonator oscillator inverter output

OSC13)

External clock input or Resonator os-

cillator inverter input

VDD_2

Digital Main Supply Voltage

PE0/TDO

I/O CT

Port E0

SCI Transmit Data Out

62127

PE1/RDI

I/O CT

Port E1

SCI Receive Data In

PE2

I/O CT

X5) X5) Port E2

PE3

I/O CT

Port E3

Pin n°

Pin Name

Level

Port

Main

function

(after

reset)

Alternate function

Input

Output

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