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LAN9252/ML bảng dữ liệu(PDF) 248 Page - Microchip Technology

tên linh kiện LAN9252/ML
Giải thích chi tiết về linh kiện  2/3-Port EtherCAT® Slave Controller with Integrated Ethernet PHYs
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nhà sản xuất  MICROCHIP [Microchip Technology]
Trang chủ  http://www.microchip.com
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LAN9252/ML bảng dữ liệu(HTML) 248 Page - Microchip Technology

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LAN9252
DS00001909A-page 248
 2015 Microchip Technology Inc.
12.14.30 EXTENDED PDI CONFIGURATION REGISTER
The bit definitions of this register are dependent on the selected PDI mode (Process Data Interface field in the PDI Con-
trol Register): Digital I/O Mode or SPI Mode.
Extended PDI Configuration Register: Digital I/O Mode
Note 17:
The default value of this field can be configured via EEPROM. Refer to Section 12.8, "EEPROM Configu-
rable Registers," on page 201 for additional information.
Note:
For EtherCAT Core CSR registers longer than one byte, the LSB has the lowest address and the MSB the
highest address.
Offset:
0152h-0153h
Size:
16 bits
Bits
Description
ECAT
Type
PDI
Type
Default
15:8
RESERVED
RO
RO
0000h
7
I/O[15:14] Direction
0:
Input
1:
Output
Note:
Reserved in bidirectional mode (0b).
RO
RO
0b
Note 17
6
I/O[13:12] Direction
0:
Input
1:
Output
Note:
Reserved in bidirectional mode (0b).
RO
RO
0b
Note 17
5
I/O[11:10] Direction
0:
Input
1:
Output
Note:
Reserved in bidirectional mode (0b).
RO
RO
0b
Note 17
4
I/O[9:8] Direction
0:
Input
1:
Output
Note:
Reserved in bidirectional mode (0b).
RO
RO
0b
Note 17
3
I/O[7:6] Direction
0:
Input
1:
Output
Note:
Reserved in bidirectional mode (0b).
RO
RO
0b
Note 17
2
I/O[5:4] Direction
0:
Input
1:
Output
Note:
Reserved in bidirectional mode (0b).
RO
RO
0b
Note 17
1
I/O[3:2] Direction
0:
Input
1:
Output
Note:
Reserved in bidirectional mode (0b).
RO
RO
0b
Note 17
0
I/O[1:0] Direction
0:
Input
1:
Output
Note:
Reserved in bidirectional mode (0b).
RO
RO
0b
Note 17



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