M58LR128GT datasheet(18/84 Pages) STMICROELECTRONICS

18 / 84 page

M58LR128GT, M58LR128GB

18/84

Enhanced Factory Program operation and re-

turned to Read Status Register mode. A full Status

block has been successfully programmed. See the

section on the Status Register for more details.

For optimum performance the Buffer Enhanced

Factory Program command should be limited to a

maximum of 100 program/erase cycles per block.

If this limit is exceeded the internal algorithm will

continue to work properly but some degradation in

performance is possible. Typical program times

are given in Table 17.

See APPENDIX C., Figure 27., Buffer Enhanced

Factory Program Flowchart and Pseudo Code, for

a suggested flowchart on using the Buffer En-

hanced Factory Program command.

Program/Erase Suspend Command

The Program/Erase Suspend command is used to

pause a Program or Block Erase operation. The

command can be addressed to any bank.

The Program/Erase Resume command is re-

quired to restart the suspended operation.

One bus write cycle is required to issue the Pro-

gram/Erase Suspend command. Once the Pro-

gram/Erase Controller has paused bits SR7, SR6

and/ or SR2 of the Status Register will be set to ‘1’.

The following commands are accepted during Pro-

gram/Erase Suspend:

–

Program/Erase Resume

–

Read Array (data from erase-suspended

block or program-suspended Word is not

valid)

–

Read Status Register

–

Read Electronic Signature

–

Read CFI Query.

Additionally, if the suspended operation was a

Block Erase then the following commands are also

accepted:

–

Clear Status Register

–

Program (except in erase-suspended

block)

–

Buffer Program (except in erase

suspended blocks)

–

Block Lock

–

Block Lock-Down

–

Block Unlock.

During an erase suspend the block being erased

can be protected by issuing the Block Lock or

Block Lock-Down commands. When the Program/

Erase Resume command is issued the operation

will complete.

It is possible to accumulate multiple suspend oper-

ations. For example: suspend an erase operation,

start a program operation, suspend the program

operation, then read the array.

If a Program command is issued during a Block

Erase Suspend, the erase operation cannot be re-

sumed until the program operation has completed.

The Program/Erase Suspend command does not

change the read mode of the banks. If the sus-

pended bank was in Read Status Register, Read

Electronic signature or Read CFI Query mode the

bank remains in that mode and outputs the corre-

sponding data.

Refer to Dual Operations section for detailed infor-

mation about simultaneous operations allowed

during Program/Erase Suspend.

During a Program/Erase Suspend, the device can

be placed in standby mode by taking Chip Enable

to VIH. Program/erase is aborted if Reset, RP,

goes to VIL.

See APPENDIX C., Figure 22., Program Suspend

& Resume Flowchart and Pseudo Code, and Fig-

ure 24., Erase Suspend & Resume Flowchart and

Pseudo Code, for flowcharts for using the Pro-

gram/Erase Suspend command.

Program/Erase Resume Command

The Program/Erase Resume command is used to

restart the program or erase operation suspended

by the Program/Erase Suspend command. One

Bus Write cycle is required to issue the command.

The command can be issued to any address.

The Program/Erase Resume command does not

change the read mode of the banks. If the sus-

pended bank was in Read Status Register, Read

Electronic signature or Read CFI Query mode the

bank remains in that mode and outputs the corre-

sponding data.

If a Program command is issued during a Block

Erase Suspend, then the erase cannot be re-

sumed until the program operation has completed.

See APPENDIX C., Figure 22., Program Suspend

& Resume Flowchart and Pseudo Code, and Fig-

ure 24., Erase Suspend & Resume Flowchart and

Pseudo Code, for flowcharts for using the Pro-

gram/Erase Resume command.

Protection Register Program Command

The Protection Register Program command is

used to program the user One-Time-Programma-

ble (OTP) segments of the Protection Register and

the two Protection Register Locks.

The device features 16 OTP segments of 128 bits

and one OTP segment of 64 bits, as shown in Fig-

ure 5., Protection Register Memory Map.

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