| công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
|
LS1021ASE7MQB bảng dữ liệu(PDF) 49 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
LS1021ASE7MQB bảng dữ liệu(HTML) 49 Page - NXP Semiconductors |
|
49 / 205 page ![]() Table 1. Pinout list by bus (continued) Signal Signal description Package pin number Pin type Power supply Notes AVDD_D1 DDR1 PLL supply K17 --- AVDD_D1 --- AVDD_SD1_PLL1 SerDes1 PLL 1 supply U11 --- AVDD_SD1_PLL1 --- AVDD_SD1_PLL2 SerDes1 PLL 2 supply U14 --- AVDD_SD1_PLL2 --- SENSEVDD Vdd Sense pin H16 --- SENSEVDD --- SENSEVDDC Vddc Sense pin V8 --- SENSEVDDC --- USB_HVDD 3.3V High Supply D4 --- USB_HVDD --- USB1_SDVDD Analog and digital HS supply H7 --- USB1_SDVDD --- USB1_SPVDD Analog and digital SS supply J9 --- USB1_SPVDD --- USB1_SXVDD Transmit supply J8 --- USB1_SXVDD --- No Connection Pins NC_F19 No Connection F19 --- --- 12 NC_G18 No Connection G18 --- --- 12 NC_H19 No Connection H19 --- --- 12 NC_J17 No Connection J17 --- --- 12 NC_L6 No Connection L6 --- --- 12 NC_M6 No Connection M6 --- --- 12 NC_U16 No Connection U16 --- --- 12 NC_V7 No Connection V7 --- --- 12 NC_V16 No Connection V16 --- --- 12 NC_W16 No Connection W16 --- --- 12 NC_W17 No Connection W17 --- --- 12 NC_DET No Connection AB23 --- --- 12 Reserved Pins SPARE1 --- G14 --- --- 12 SPARE2 --- F13 --- --- 12 1. Functionally, this pin is an output or an input, but structurally it is an I / O because it either sample configuration input during reset, is a muxed pin, or has other manufacturing test functions. This pin will therefore be described as an I / O for boundary scan. 2. This output is actively driven during reset rather than being tri-stated during reset. 3. MDIC[0] is grounded through an 162Ω precision 1% resistor and MDIC[1] is connected to GVDD through an 162Ω precision 1% resistor. For either full or half driver strength calibration of DDR IOs, use the same MDIC resistor value of 162Ω. Memory controller register setting can be used to determine automatic calibration is done to full or half drive strength. These pins are used for automatic calibration of the DDR3L/DDR4 IOs. The MDIC[0:1] pins must be connected to 162Ω precision 1% resistors. LS1021A Ball Map and Pin List QorIQ LS1021A Data Sheet, Rev. 5, 09/2017 NXP Semiconductors 49 |
|
Link URL |
| Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không? [ DONATE ] |
Alldatasheet là | Quảng cáo | Liên lạc với chúng tôi | Chính sách bảo mật | Liên kết đến bảng dữ liệu | Trao đổi link | Tìm kiếm theo nhà sản xuất All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |