LS1021ASE7MQB datasheet(2/205 Pages) NXP

2 / 205 page

Table of Contents

1 Introduction.......................................................................................... 3

2 Pin assignments.................................................................................... 4

2.1

LS1021A Ball Map and Pin List............................................... 4

3 Electrical characteristics.......................................................................51

3.1

Overall DC electrical characteristics......................................... 51

3.2

Power sequencing......................................................................58

3.3

Power-down requirements.........................................................61

3.4

Power characteristics................................................................. 61

3.5

I/O DC power supply recommendation.....................................63

3.6

Power-on ramp rate................................................................... 66

3.7

Input clocks............................................................................... 67

3.8

RESET initialization..................................................................74

3.9

DDR3L and DDR4 SDRAM controller.................................... 75

3.10 DUART interface...................................................................... 81

3.11 Ethernet interface, Ethernet management interface, IEEE Std

1588........................................................................................... 83

3.12 QUICC engine specifications.................................................... 100

3.13 USB 2.0 interface...................................................................... 106

3.14 USB 3.0 interface...................................................................... 109

3.15 Integrated flash controller (IFC)................................................113

3.16 LPUART interface.....................................................................122

3.17 Flextimer interface.....................................................................124

3.18 FlexCAN interface.....................................................................126

3.19 SAI/I2S interface....................................................................... 128

3.20 SPDIF interface......................................................................... 132

3.21 SPI interface.............................................................................. 134

3.22 QuadSPI interface......................................................................139

3.23 Enhanced secure digital host controller (eSDHC).....................141

3.24 JTAG controller.........................................................................150

3.25 I2C interface.............................................................................. 153

3.26 GPIO interface...........................................................................156

3.27 GIC interface............................................................................. 158

3.28 Display controller unit (2D-ACE)............................................. 160

3.29 High-speed serial interfaces (HSSI).......................................... 162

4 Hardware design considerations...........................................................183

4.1

Power supply design..................................................................183

4.2

Decoupling recommendations................................................... 188

4.3

SerDes block power supply decoupling recommendations.......189

4.4

Connection recommendations................................................... 189

4.5

Thermal......................................................................................194

4.6

Recommended thermal model...................................................194

4.7

Temperature diode.....................................................................195

4.8

Thermal management information............................................ 195

5 Package information.............................................................................198

5.1

Mechanical dimensions of the FC-PBGA................................. 198

6 Security fuse processor.........................................................................200

7 Ordering information............................................................................200

7.1

Part numbering nomenclature....................................................200

7.2

Orderable part numbers addressed by this document................201

8 Revision history....................................................................................202

QorIQ LS1021A Data Sheet, Rev. 5, 09/2017

NXP Semiconductors

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