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LP5952TL-1.0/NOPB bảng dữ liệu(PDF) 5 Page - Texas Instruments |
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LP5952TL-1.0/NOPB bảng dữ liệu(HTML) 5 Page - Texas Instruments |
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5 / 26 page ![]() LP5952 www.ti.com SNVS469F – OCTOBER 2006 – REVISED DECEMBER 2015 6.4 Thermal Information LP5952 THERMAL METRIC(1) YZR (DSBGA) NKH (USON) UNIT 5 PINS 6 PINS RθJA Junction-to-ambient thermal resistance(2) 181.0 181.6 °C/W RθJC(top) Junction-to-case (top) thermal resistance 0.9 93.1 °C/W RθJB Junction-to-board thermal resistance 110.3 116.7 °C/W ψJT Junction-to-top characterization parameter 7.4 8.0 °C/W ψJB Junction-to-board characterization parameter 110.3 116.7 °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. (2) Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power dissipation exists, special attention must be paid to thermal dissipation issues in board design. 6.5 Electrical Characteristics Unless otherwise noted, typical values are for TA = 25°C, and minimum and maximum limits apply over the full operating temperature range: –40°C ≤ TJ ≤ +125°C; specifications apply to the Typical Application Circuit with VIN = VOUT(NOM) + 1 V, VBATT = VOUT(NOM) + 1.5 V or 2.5 V (whichever is higher), IOUT = 1 mA, CVIN = 1 µF, COUT = 2.2 µF, VEN = VBATT. (1) (2) (3) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VIN = VOUT(NOM) + 0.3 V, TA = 25°C –1.5 1.5 ΔVOUT / VOUT Output voltage tolerance VIN = VOUT(NOM) + 0.3 V 2 2 VIN = VOUT(NOM) + 0.3 V to 4.5 V, VBATT = 1 0.3 1 mV/V ΔVOUT / ΔVIN 4.5 V Line regulation error ΔVOUT / VBATT = VOUT(NOM) + 1.5 V (≥ 2.5 V) to 5.5 2.2 2.2 0.5 ΔVBATT V DSBGA 30 IOUT = 1 mA to 350 mA 15 30 µV/mA package ΔVOUT / ΔmA Load regulation error USON 60 IOUT = 1 mA to 350 mA 43 60 µV/mA package Output current (short VOUT = 0 V, VEN = VIN = VBATT = VOUT(NOM) ISC 350 500 mA circuit) + 1.5 V IOUT = 350 mA, VIN = DSBGA 1.07 1.5 V VOUT(NOM) + 0.3 V package IOUT = 350 mA USON 1.08 1.5 V VIN = VOUT(NOM) + 0.3 V package VDO_VBATT Output voltage dropout (4) VBATT (5) IOUT = 150 mA DSBGA 0.96 1.3 V VIN = VOUT(NOM) + 0.3 V package IOUT = 150 mA USON 0.97 1.3 V VIN = VOUT(NOM) + 0.3 V package IOUT = 350 mA DSBGA VBATT = VOUT(NOM) + 1.5 V 88 200 mV package or 2.5 V Output voltage dropout VDO_VIN VIN IOUT = 350 mA USON VBATT = VOUT(NOM) + 1.5 V 128 250 mV package or 2.5 V EN Output noise 10 Hz to 100 kHz 100 µVRMS (1) All voltages are with respect to the potential at the GND pin. (2) Minimum and maximum limits are ensured by design, test, or statistical analysis. Typical numbers are not ensured, but do represent the most likely norm. Unless otherwise specified, conditions for typical specifications are: VIN = VOUT(NOM) + 1 V, VBATT = VOUT(NOM) + 1.5 V or 2.5 V, whichever is higher, TA = 25°C. (3) VOUT(NOM) is the stated output voltage option (4) This specification does not apply if the battery voltage VBATT needs to be decreased below the minimum operating limit of 2.5 V during this test. (5) Dropout voltage is defined as the input to output voltage differential at which the output voltage falls to 100mV below the nominal output voltage. Copyright © 2006–2015, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: LP5952 |
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