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LP3982 bảng dữ liệu(PDF) 4 Page - Texas Instruments |
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LP3982 bảng dữ liệu(HTML) 4 Page - Texas Instruments |
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4 / 29 page ![]() 4 LP3982 SNVS185F – FEBRUARY 2002 – REVISED APRIL 2017 www.ti.com Product Folder Links: LP3982 Submit Documentation Feedback Copyright © 2002–2017, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltages are with respect to the potential at the GND pin. (3) If Military/Aerospace-specified devices are required, contact Texas Instruments Sales Office/Distributors for availability and specifications. (4) In applications where high power dissipation and/or poor thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (TA(MAX)) is dependant on the maximum operating junction temperature (TJ(MAX-OP)), the maximum power dissipation (PD(MAX)), and the junction-to-ambient thermal resistance in the application (RθJA). This relationship is given by: TA(MAX) = TJ(MAX-OP) − (PD(MAX) × RθJA).The value of the RθJA for the WSON package is specifically dependent on the PCB trace area, trace material, and the number of layers and thermal vias. For improved thermal resistance and power dissipation for the WSON package, refer to TI Application Note AN-1187 Leadless Leadframe Package (LLP) (SNOA401). 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) (2) (3) MIN MAX UNIT VIN, VOUT, VSHDN, VSET, VCC, VFAULT −0.3 6.5 V Fault sink current 20 mA Power dissipation See(4) Junction temperature, TJ 150 °C Storage temperature, Tstg –65 160 °C (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. 6.2 ESD Ratings VALUE UNIT V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V Machine model ±200 V (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltages are with respect to the potential at the GND pin. 6.3 Recommended Operating Conditions (1) (2) MIN NOM MAX UNIT Operating temperature –40 85 °C Supply voltage 2.5 6 V (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. (2) The PCB for the WSON/NGN package RθJA includes thermal vias under the exposed thermal pad per EIA/JEDEC JESD51-5. (3) Thermal resistance value RθJA is based on the EIA/JEDEC High-K printed circuit board defined by: JESD51-7 - High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages. 6.4 Thermal Information THERMAL METRIC(1) LP3982 UNIT DGK (VSSOP) NGM (WSON)(2) 8 PINS 8 PINS RθJA (3) Junction-to-ambient thermal resistance, High-K 175.2 52.6 °C/W RθJC(top) Junction-to-case (top) thermal resistance 66.0 66.2 °C/W RθJB Junction-to-board thermal resistance 95.6 16.7 °C/W ψJT Junction-to-top characterization parameter 9.7 1.9 °C/W ψJB Junction-to-board characterization parameter 94.2 16.7 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance n/a 11.1 °C/W |
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