F0448_V01 datasheet(38/43 Pages) RENESAS

tên linh kiện	F0448

Giải thích chi tiết về linh kiện	Dual Matched Broadband RF DVGA 3.3GHz to 4.2GHz

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F0448 Datasheet

X0008129 Rev.1.4

Feb 17, 2021

Page 38

Table 14. Attenuator Control Using One Latch Signal

CSb_A (J12)

CSb_B (J15)

Function

OPEN

No control of attenuators

OPEN

CLOSED

DSA1_B attenuator is controlled

CLOSED

OPEN

DSA1_A attenuator is controlled

CLOSED

DSA1_A attenuator is controlled DSA1_B attenuator is controlled

Figure 80. Jumpers for Serial Programming Connections

7.4.5.

Parallel Control Pins

Both channels have two other attenuators, DSA0 and DSA2, which are parallel controlled. These parallel pins

are located on header J13 shown in Figure 81. Table 14 lists the pin functions on header J13.

Figure 81. Parallel Pin Connections

See Table 8 and Table 9 for the attenuation control.

7.4.6.

Power-On Procedure

Set up the voltage supplies and Evaluation Board as described in “Power Supply Setup” with the “Standby Pin”

set for logic LOW, then enable the power supply.

7.4.7.

Power-Off Procedure

Disable the power supply.

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