LTC1727 datasheet(11/16 Pages) LINER

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LTC2917/LTC2918

29178f

The reference input of the comparator is controlled by the

tolerance pin. The external resistive divider should make

the voltage at VM = 0.5V when the supply is at nominal

value. The actual threshold of VM accounts for the sup-

ply tolerance of ±1.5% guaranteed over the full operating

temperature range. The resulting tolerances are –6.5%,

–11.5%, –16.5% which correspond to 0.468V, 0.443V,

0.418V respectively.

Typically, the user will pick a value of R1 based on accept-

able current draw. Current used by the resistor divider will

be approximately:

= ⎛

⎝⎜

⎞

⎠⎟

Recommended range of R1 is 1k—1M. Higher values of

resistance exacerbate the degradation of threshold ac-

curacy due to leakage currents.

If the nominal value of the supply being monitored is

VNOM, then

R2 = R1(2VNOM – 1)

Resistor tolerances must be taken into account when

determining the overall accuracy.

Selecting the Reset Timing Capacitor

The reset timeout period can be set to one of two ﬁxed

internal timers or set with a capacitor in order to accom-

modate a variety of applications. Connecting a capacitor,

CRT, between the RT pin and ground sets the reset timeout

period, tRST. The following formula approximates the value

of capacitor needed for a particular timeout:

CRT = tRST • 110 [pF/ms]

For example, using a standard capacitor value of 2.2nF

would give a 20ms timeout.

Figure 2 shows the desired reset timeout period as a

function of the value of the timer capacitor.

Leaving RT open with no external capacitor generates a

reset timeout of approximately 400μs. Shorting RT to VCC

generates a reset timeout of approximately 200ms.

⎯R⎯S⎯T Output Characteristics

The DC characteristics of the ⎯R⎯S⎯T pull-down strength

are shown in the Typical Performance Characteristics

section. ⎯R⎯S⎯T is an open-drain pin and thus requires an

external pull-up resistor to the logic supply. ⎯R⎯S⎯T may be

pulled above VCC, providing the voltage limits of the pin

are observed.

The open-drain of the ⎯R⎯S⎯T pin allows for wired-OR con-

nection of several LTC2917/LTC2918’s.

Watchdog

LTC2917-A/LTC2918-A

A standard watchdog function is used to ensure that the

system is in a valid state by continuously monitoring

the microprocessor’s activity. The microprocessor must

toggle the logic state of the WDI pin periodically (within

upper boundary) in order to clear the watchdog timer. If

timeout occurs, the LTC2917-A/LTC2918-A asserts ⎯R⎯S⎯T

low for the reset timeout period, issuing a system reset.

Once the reset timeout completes, ⎯R⎯S⎯T is released to go

high and the watchdog timer starts again.

During power-up, the watchdog timer remains cleared while

⎯R⎯S⎯T is asserted low. As soon as the reset timer times out,

⎯R⎯S⎯T goes high and the watchdog timer is started.

APPLICATIONS INFORMATION

Figure 2. Reset Timeout Period vs RT Capacitance

RT PIN CAPACITANCE, CRT (nF)

0.001

0.1

10000

0.1

0.01

100

1000

29178 F02

100

1000

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