L6740L datasheet(34/44 Pages) STMICROELECTRONICS

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Output voltage monitoring and protections

L6740L

34/44

Typical design considers the intervention of the Average OC before the per-phase OC, leav-

ing this last one as an extreme-protection in case of hardware failures in the external com-

ponents. Typical design flow is the following:

–

Define the maximum total output current (IOC_AVGmax) according to system

requirements

–Set IOC_TH to 35µA. This implies ROC_TH = 33kΩ (OC_PHASE pin is fixed to

1.24V and IOC_TH is the current programmed through ROC_TH).

–Design RG resistor in order to have IINFOx = IOC_TH when IOUT is about 10% higher

than the IOC_AVGmax current. It results:

where N is the number of phases and DCR the DC resistance of the inductors. RG

should be designed in worst-case conditions.

–Design ROC_AVG in order to have the OC_AVG/LI pin voltage to VOC_AVGTH at the

desired maximum current IOC_AVGmax. It results:

where VOC_AVGTH is typically 2.5V and IOC_AVGmax is the AVG_OC threshold

desired.

–

Adjust the defined values according to bench-test of the application.

–

An additional capacitor in parallel to ROC_AVG can be considered to add a delay in

the protection intervention.

Note:

What previoulsy listed is the typical design flow. In any case, custom design may require

different settings and ratios between the per-phase OC threshold and the AVG OC

threshold. Applications with huge ripple across inductors may required to set IOC_TH to

values higher than 35

µA: in this case the threshold may be increased still keeping I

OC_TH <

µA.

7.4.2

NB section

Since the NB Section reads the current across Low-Side MOSFET, it limits the bottom of the

NB inductor current entering in Constant Current until UV. In particular, since the device lim-

its the valley of the inductor current, the ripple entity, when not negligible, impacts on the real

OC threshold value and must be considered.

The device detects an Over Current condition when the current information IISEN overcomes

the fixed threshold of IOCTH_NB (35µA typ). When this happens, the device keeps the Low-

Side MOSFET on, also skipping clock cycles, until the threshold is crossed back and IISEN

results being lower than the IOCTH_NB threshold. After exiting the OC condition, the Low-

Side MOSFET is turned off and the High-Side is turned on with a duty cycle driven by the

PWM comparator.

The Section enters the Quasi-Constant-Current operation: the Low-Side MOSFET stays ON

until the current read becomes lower than IOCP_NB skipping clock cycles. The High-Side

MOSFET can be then turned ON with a TON imposed by the control loop after the Low-Side

MOSFET turn-off and the Section works in the usual way until another OC event is detected.

This means that the average current delivered can slightly increase in Quasi-Constant-Cur-

1.1 I

OC_AVGmax

⋅

() DCR

⋅

OCTH

------------------------------------------------------------------

OC_AVG

OC_AVGTH

⋅

OC_AVGmax

DCR

⋅

------------------------------------------------

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