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LSM6DSV80X bảng dữ liệu(PDF) 175 Page - STMicroelectronics

tên linh kiện LSM6DSV80X
Giải thích chi tiết về linh kiện  6-axis IMU (inertial measurement unit) with high-g accelerometer, embedded AI, and sensor fusion for wearables and sport trackers
PDF  181 Pages
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
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LSM6DSV80X bảng dữ liệu(HTML) 175 Page - STMicroelectronics

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Table 219. EMB_FUNC_INT2 register ........................................................... 106
Table 220. EMB_FUNC_INT2 register description ................................................... 106
Table 221. FSM_INT2 register................................................................. 107
Table 222. FSM_INT2 register description ........................................................ 107
Table 223. MLC_INT2 register................................................................. 108
Table 224. MLC_INT2 register description ........................................................ 108
Table 225. EMB_FUNC_STATUS register......................................................... 108
Table 226. EMB_FUNC_STATUS register description................................................. 108
Table 227. FSM_STATUS register .............................................................. 109
Table 228. FSM_STATUS register description ...................................................... 109
Table 229. MLC_STATUS register .............................................................. 109
Table 230. MLC_STATUS register description ...................................................... 109
Table 231. PAGE_RW register .................................................................110
Table 232. PAGE_RW register description .........................................................110
Table 233. SFLP_GBIASX_H and SFLP_GBIASX_L registers............................................111
Table 234. SFLP_GBIASX_H and SFLP_GBIASX_L register description ....................................111
Table 235. SFLP_GBIASY_H and SFLP_GBIASY_L registers............................................111
Table 236. SFLP_GBIASY_H and SFLP_GBIASY_L register description ....................................111
Table 237. SFLP_GBIASZ_H and SFLP_GBIASZ_L registers ............................................111
Table 238. SFLP_GBIASZ_H and SFLP_GBIASZ_L register description ....................................111
Table 239. SFLP_GRAVX_H and SFLP_GRAVX_L registers.............................................112
Table 240. SFLP_GRAVX_H and SFLP_GRAVX_L register description .....................................112
Table 241. SFLP_GRAVY_H and SFLP_GRAVY_L registers.............................................112
Table 242. SFLP_GRAVY_H and SFLP_GRAVY_L register description .....................................112
Table 243. SFLP_GRAVZ_H and SFLP_GRAVZ_L registers .............................................112
Table 244. SFLP_GRAVZ_H and SFLP_GRAVZ_L register description .....................................112
Table 245. SFLP_QUATW_H and SFLP_QUATW_L registers ............................................113
Table 246. SFLP_QUATW_H and SFLP_QUATW_L register description.....................................113
Table 247. SFLP_QUATX_H and SFLP_QUATX_L registers .............................................113
Table 248. SFLP_QUATX_H and SFLP_QUATX_L register description .....................................113
Table 249. SFLP_QUATY_H and SFLP_QUATY_L registers .............................................113
Table 250. SFLP_QUATY_H and SFLP_QUATY_L register description .....................................113
Table 251. SFLP_QUATZ_H and SFLP_QUATZ_L registers .............................................114
Table 252. SFLP_QUATZ_H and SFLP_QUATZ_L register description......................................114
Table 253. SFLP_GBIASX_INIT_H and SFLP_GBIASX_INIT_L registers ....................................114
Table 254. SFLP_GBIASX_INIT_H and SFLP_GBIASX_INIT_L register description.............................114
Table 255. SFLP_GBIASY_INIT_H and SFLP_GBIASY_INIT_L registers ....................................114
Table 256. SFLP_GBIASY_INIT_H and SFLP_GBIASY_INIT_L register description.............................114
Table 257. SFLP_GBIASZ_INIT_H and SFLP_GBIASZ_INIT_L registers ....................................115
Table 258. SFLP_GBIASZ_INIT_H and SFLP_GBIASZ_INIT_L register description .............................115
Table 259. EMB_FUNC_FIFO_EN_A register .......................................................115
Table 260. EMB_FUNC_FIFO_EN_A register description ...............................................115
Table 261. EMB_FUNC_FIFO_EN_B register .......................................................116
Table 262. EMB_FUNC_FIFO_EN_B register description ...............................................116
Table 263. FSM_ENABLE register ...............................................................116
Table 264. FSM_ENABLE register description.......................................................116
Table 265. FSM_LONG_COUNTER_L register ......................................................117
Table 266. FSM_LONG_COUNTER_L register description ..............................................117
Table 267. FSM_LONG_COUNTER_H register ......................................................117
Table 268. FSM_LONG_COUNTER_H register description..............................................117
Table 269. INT_ACK_MASK register .............................................................118
Table 270. INT_ACK_MASK register description .....................................................118
Table 271. FSM_OUTS1 register ................................................................119
Table 272. FSM_OUTS1 register description........................................................119
Table 273. FSM_OUTS2 register ................................................................119
LSM6DSV80X
List of tables
DS14764 - Rev 1
page 175/181



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