LSM6DSV80X datasheet(173/181 Pages) STMICROELECTRONICS

173 / 181 page

Table 109. UI_OUTY_A_HG register description ..................................................... 73

Table 110. UI_OUTZ_L_A_HG register............................................................ 74

Table 111. UI_OUTZ_H_A_HG register ........................................................... 74

Table 112. UI_OUTZ_A_HG register description ..................................................... 74

Table 113. TIMESTAMP output registers .......................................................... 75

Table 114. TIMESTAMP output register description ................................................... 75

Table 115. UI_STATUS_REG register ............................................................ 75

Table 116. UI_STATUS_REG register description .................................................... 75

Table 117. WAKE_UP_SRC register ............................................................. 76

Table 118. WAKE_UP_SRC register description ..................................................... 76

Table 119. TAP_SRC register .................................................................. 77

Table 120. TAP_SRC register description .......................................................... 77

Table 121. D6D_SRC register .................................................................. 78

Table 122. D6D_SRC register description .......................................................... 78

Table 123. STATUS_CONTROLLER_MAINPAGE register .............................................. 78

Table 124. STATUS_CONTROLLER_MAINPAGE register description ...................................... 78

Table 125. EMB_FUNC_STATUS_MAINPAGE register ................................................ 79

Table 126. EMB_FUNC_STATUS_MAINPAGE register description ........................................ 79

Table 127. FSM_STATUS_MAINPAGE register ...................................................... 79

Table 128. FSM_STATUS_MAINPAGE register description .............................................. 79

Table 129. MLC_STATUS _MAINPAGE register ..................................................... 80

Table 130. MLC_STATUS_MAINPAGE register description .............................................. 80

Table 131. HG_WAKE_UP_SRC register .......................................................... 80

Table 132. HG_WAKE_UP_SRC register description .................................................. 80

Table 133. CTRL2_XL_HG register .............................................................. 81

Table 134. CTRL2_XL_HG register description ...................................................... 81

Table 135. CTRL1_XL_HG register .............................................................. 81

Table 136. CTRL1_XL_HG register description ...................................................... 81

Table 137. High-g accelerometer ODR selection ..................................................... 81

Table 138. High-g accelerometer full-scale selection .................................................. 81

Table 139. INTERNAL_FREQ_FINE register........................................................ 82

Table 140. INTERNAL_FREQ_FINE register description................................................ 82

Table 141. ODRcoeff values .................................................................... 82

Table 142. FUNCTIONS_ENABLE register ......................................................... 83

Table 143. FUNCTIONS_ENABLE register description ................................................. 83

Table 144. HG_FUNCTIONS_ENABLE register...................................................... 84

Table 145. HG_FUNCTIONS_ENABLE register description ............................................. 84

Table 146. HG_WAKE_UP_THS register .......................................................... 84

Table 147. HG_WAKE_UP_THS register description .................................................. 84

Table 148. INACTIVITY_DUR register ............................................................ 85

Table 149. INACTIVITY_DUR register description .................................................... 85

Table 150. INACTIVITY_THS register ............................................................ 86

Table 151. INACTIVITY_THS register description .................................................... 86

Table 152. TAP_CFG0 register ................................................................. 87

Table 153. TAP_CFG0 register description ......................................................... 87

Table 154. TAP_CFG1 register ................................................................. 88

Table 155. TAP_CFG1 register description ......................................................... 88

Table 156. TAP priority decoding ................................................................ 88

Table 157. TAP_CFG2 register ................................................................. 88

Table 158. TAP_CFG2 register description ......................................................... 88

Table 159. TAP_THS_6D register ............................................................... 89

Table 160. TAP_THS_6D register description ....................................................... 89

Table 161. Threshold for D4D/D6D function ........................................................ 89

Table 162. TAP_DUR register .................................................................. 90

Table 163. TAP_DUR register description .......................................................... 90

LSM6DSV80X

List of tables

DS14764 - Rev 1

page 173/181

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