AD8488

Data Sheet

Rev. A | Page 8 of 20

Mnemonic

Pin No.

I/O

Description

IN0 to IN127

See Table 6 and Table 7

I

Analog Inputs.

IRST

E15

I

Integrator Reset. Closes a switch across the integration capacitor, CF1,

to set the output to zero.

NC

A13, A15, B13, C13, D13, E10, E12, E13, F11,

F13, G13, H13, J12, J13, K13, L13, M12, M13,

N13, P13, R13, T13

No connect. Connect these pins to GND on the PCB.

OUTLOW

F12

O

Inverting Analog Output (Negative) of the Differential Output.

OUTHIGH

G12

O

Noninverting Analog Output (Positive) of the Differential Output.

PWR

P14

I

Normal state is logic low; reduces analog bias current by approximately

80% when high.

RST

A16

I

Reset Gray Mode Counter for Mux.

TST_MODE

J14

I

Test Mode Enable. This control line is used together with the TST0 to

TST6 address bits to test or debug a system by continuously selecting a

channel.

TST0 to TST6

T15, R15, P15, N15, M14, L14, K14

I

Channel Address Select Bits When in Test Mode (see Table 8).

VREF

L12

I

Reference Input for Analog Circuit (2.048 V).

VREF_ESD

K12

I

ESD Reference. Connect to VREF (2.048 V).

WR

G14

I

Write Digital Instruction Word to the AFE.