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MCP3919B bảng dữ liệu(PDF) 59 Page - Microchip Technology |
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MCP3919B bảng dữ liệu(HTML) 59 Page - Microchip Technology |
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59 / 81 page ![]() 2025 Microchip Technology Inc. and its subsidiaries DS20006995A-page 59 MCP3919B 9.2 MOD Register – Modulators Output Register The MOD register contains the most recent modulator data output and is updated at a DMCLK rate. The default value corresponds to an equivalent input of 0V on all ADCs. Each bit in this register corresponds to one comparator output on one of the channels. Do not write to this register to ensure the accuracy of each ADC. . Name Bits Address Cof. MOD 24 0x08 R/W REGISTER 9-2: MOD REGISTER U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0 — — — — — — — — bit 23 bit 16 U-0 U-0 U-0 U-0 R/W-0 R/W-0 R/W-1 R/W-1 — — — — COMP3_CH2 COMP2_CH2 COMP1_CH2 COMP0_CH2 bit 15 bit 8 R/W-0 R/W-0 R/W-1 R/W-1 R/W-0 R/W-0 R/W-1 R/W-1 COMP3_CH1 COMP2_CH1 COMP1_CH1 COMP0_CH1 COMP3_CH0 COMP2_CH0 COMP1_CH0 COMP0_CH0 bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 23-12 Unimplemented: Read as ‘0’ bit 11-8 COMPn_CH2: Comparator Outputs from ADC Channel 2 bits bit 7-4 COMPn_CH1: Comparator Outputs from ADC Channel 1 bits bit 3-0 COMPn_CH0: Comparator Outputs from ADC Channel 0 bits |
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