KSZ9567R_V01 datasheet(227/233 Pages) MICROCHIP

227 / 233 page

 2022 Microchip Technology Inc. and its subsidiaries

DS00002329E-page 227

KSZ9567R

Section 4.12, "In-Band Man-

agement"

• Added to last sentence of first paragraph.

• Added additional sentence to end of second

paragraph.

• Added additional sentence to end of sixth

paragraph.

Section 5.1.6.17, "Time-

stamp Control and Status

Updated bit 6 definition.

Section 5.2.1.7, "Port Oper-

ation Control 0 Register"

Updated bit 6 and 7 descriptions to include refer-

ences to the MAC and additional clarification.

Section 5.2.2.15, "PHY

Remote Loopback Register"

Simplified bit 8 description.

Section 5.2.4.1, "Port MAC

Control 0 Register," on

page 157

Bit 0 made reserved.

Section 6.4.8, "Power-up

and Reset Timing," on

page 216

Updated Note 1.

Table 6-12

Added new “trw” entry to table.

DS00002329C (10-23-18)

Section 8.1, "Package Mark-

ing Information," on

page 221

Updated top marking information.

Section 8.2, "Package Draw-

ings," on page 222

Updated package drawings.

Table 4-16, "Matching Rule

Options"

Table updated.

Section 4.4.9, "Tail Tagging

Mode," on page 39

Section updated. Added PTP specific content.

Section 4.1.9, "LinkMD®

Cable Diagnostics," on

page 23

LinkMD details added.

Section 4.4.2.4, "Learning,"

on page 30

Text correction.

Section 4.4.2.6, "Aging," on

page 31

Corrected “time stamp” to “age count” in multiple

locations.

Section 5.2.2.5, "PHY Auto-

Negotiation Advertisement

Changed default value of Pause (Flow Control)

Capability bit to a note referencing the LED1_1

configuration strap.

Section 5.2.2.10, "PHY

1000BASE-T Control Regis-

ter," on page 147

Corrected bit 10 default value. Added information

on Test Mode Bits 15:13.

TABLE A-1:

REVISION HISTORY (CONTINUED)

Revision

Section/Figure/Entry

Correction

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