TMP86FS49AIUG datasheet(77/296 Pages) TOSHIBA

77 / 296 page

Page 61

TMP86FS49AIUG

Note 1: The port placed in input mode reads the pin input state. Therefore, when the input and output modes are used together,

the output latch contents for the port in input mode might be changed by executing a bit manipulation instruction.

Note 2: When used as an analog inport, be sure to clear the corresponding bit of P6CR2 to disable the port input.

Note 3: Do not set the output mode (P6CR1 = “1”) for the pin used as an analog input pin.

Note 4: Pins not used for analog input can be used as I/O ports. During AD conversion, output instructions should not be executed

to keep a precision. In addition, a variable signal should not be input to a port adjacent to the analog input during AD con-

version.

P6DR

(0006H)

R/W

543

P67

AIN7

STOP3

P66

AIN6

STOP2

P65

AIN5

STOP1

P64

AIN4

STOP0

P63

AIN3

P62

AIN2

P61

AIN1

P60

AIN0

(Initial value: 0000 0000)

P6CR1

(0F9BH)

543

(Initial value: 0000 0000)

P6CR1

I/O control for port P6 (Specified for each bit)

0: Input mode

1: Output mode

R/W

P6CR2

(0F9CH)

543

(Initial value: 1111 1111)

P6CR2

P6 port input control (Specified for each bit)

0: Analog input

1: Port input

R/W

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