TMP86FS49AUG datasheet(66/294 Pages) TOSHIBA

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5. I/O Ports

5.1 Port P0 (P07 to P00)

TMP86FS49AUG

5.1 Port P0 (P07 to P00)

Port P0 is an 8-bit input/output port.

Port P0 is also used as an external interrupt input, Serial PROM mode control input, a serial interface input/output

and an UART input/output.

When used as an input port, an external interrupt input, a serial interface input/output and an UART input/output,

the corresponding output latch (P0DR) should be set to "1".

During reset, the P0DR is initialized to "1", and the P0OUTCR is initialized to "0".

It can be selected whether output circuit of P0 port is a C-MOS output or a sink open drain individually, by setting

P0OUTCR. When a corresponding bit of P0OUTCR is "0". the output circuit is selected to a sink open drain and

when a corresponding bit of P0OUTCR is "1", the output circuit is selected to a C-MOS output.

When used as an input port, an external interrupt input, a serial interface input and an UART input, the correspond-

ing output control (P0OUTCR) should be set to "0" after P0DR is set to "1".

P0 port output latch (P0DR) and P0 port terminal input (P0PRD) are located on their respective address.

When read the output latch data, the P0DR should be read. When read the terminal input data, the P0PRD register

should be read.

Note: i = 7 to 0

Figure 5-2 Port 0 and P0OUTCR

Table 5-1 Register Programming for Multi-function Ports (P07 to P00)

Function

Programmed Value

P0DR

P0OUTCR

Port input, external input, serial interface input or

UART input, Serial PROM mode cotrol input

“1”

“0”

Port “0” output

“0”

Programming

for each applica-

tions

Port “1” output, serial interface output or UART

output

“1”

Data output (P0DR)

Control output

STOP

OUTEN

P0OUTCRi

P0i

P0OUTCRi input

Data input (P0PRD)

Output latch read (P0DR)

Control input

Output latch

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