TMP88CS38BFG datasheet(84/218 Pages) TOSHIBA

84 / 218 page

TMP88CS38B/CM38B/CP38B

2007-09-12

88CS38B-84

2.8.2

Control

The timer/counter 4 is controlled by a timer/counter 4 control register (TC4CR) and an

8-bit timer register 4 (TC4DR). Reset does not affect TC4DR.

TC4DR

(0001BH)

Write only (Initial value: 1111 1111)

TC4CR

(0001CH)

TC4S

TC4CK

TC4M

Write only (Initial value: **00 0000)

TC4S

TC4 start control

00: Timer/event counter mode

01: Reserved

10: Reserved

11: Reserved

NORMAL, IDLE mode

DV1CK

= 0

DV1CK

= 1

000

fc/2

fs/2

001

fc/2

fs/2

010

fc/2

fs/2

011

fc/2

fs/2

100

Reserved

101

Reserved

110

Reserved

TC4CK

TC4 source clock select [Hz]

(Note 4)

111

External clock (TC4 pin input)

TC4M

TC4 operating mode select

00: Timer/event counter mode

01: Reserved

10: Reserved

11: Reserved

R/W

Note 1:

fc: High-frequency clock [Hz], *: Don’t care

Note 2:

Values to be loaded to the timer register must satisfy the following condition (1

≤ TC4DR ≤ 255).

Note 3:

When the TC4 is started (TC4S

= 0 → 1) or disabled (TC4S = 1 → 0) or while the TC4 is operating (TC4S =

→ 1), do not write to TC4M and TC4CK in TC4CR. If these registers are selected/changed during these

operations, counting up is not performed properly.

Note 4:

When STOP mode is started, timer counter is stopped and cleared. Set TC4S to “1” after STOP mode is

released for restarting timer counter.

Note 5:

Undefined values are read from bits 6 and 7 of TC4CR.

Note 6:

Do not change TC4DR while the TC4 is operating.

PMPXCR

(00027H)

“0”

CHS

TC4ES (TC3ES)

(Initial value: 00** **00)

TC4ES

TC4 edge select

0: Rising edge

1: Falling edge

Write

only

Note 1:

TC4CR, TC4DR and PMPXCR are write only register and must not be used with any of the

read-modify-write instructions such as SET, CLR, etc.

Figure 2.8.2 Timer Register 4 and TC4 Control Register

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