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TMPR4956C bảng dữ liệu(PDF) 30 Page - Toshiba Semiconductor |
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TMPR4956C bảng dữ liệu(HTML) 30 Page - Toshiba Semiconductor |
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30 / 286 page ![]() Handling Precautions 18 3.3.6 Input/Output Protection Wired-AND configurations in which outputs are connected together directly cannot be used since the outputs short-circuit with the configurations. Outputs should, of course, never be connected to the power supply voltage or GND. In addition, products with tri-state outputs can undergo IC deterioration if a shorted output current continues for a long period of time. Design the circuit so that the tri-state outputs will not be enabled simultaneously. 3.3.7 Load Capacitance Certain devices exhibit an increase in delay times and a large charging and discharging current if a large load capacitance is connected, resulting in noise. In addition, since outputs are shorted for a long period of time, wiring can become fused. Use the load capacitance recommended for each product. 3.3.8 Thermal Design The failure rate of semiconductor devices largely increases as the operating temperatures increase. As shown in Figure 3.2, the thermal stress applied to device internal circuitry is the sum of the ambient temperature and the temperature rise caused by the power consumption of the device. For thermal design, therefore, refer to the precautions stated in individual technical datasheets and databooks. To achieve even higher reliability, take into consideration the following thermal design points: (1) Conduct studies to ensure that the ambient temperature (Ta) is maintained as low as possible, avoiding the effects of heat generation from the surrounding area. (2) If the device’s dynamic power consumption is relatively large, conduct studies regarding use of forced air-cooling, circuit board composed of low thermal resistance material, and heat sinks. Such measures can lower the thermal resistance of the package. (3) Derate the device’s absolute maximum ratings to minimize thermal stress from power consumption. θja = θjc + θca θja = (Tj − Ta)/P θjc = (Tj − Tc)/P θca = (Tc − Ta)/P where, θja: Thermal resistance between junction and ambient air (°C/W) θjc: Thermal resistance between junction and package surface, or internal thermal resistance (°C/W) θca: Thermal resistance between package surface and ambient air, or external thermal resistance (°C/W) Tj: Junction temperature or chip temperature (°C) Tc: Package surface temperature or case temperature (°C) Ta: Ambient temperature (°C) P: Power consumption (W) Tc θca Ta Tj θjc Figure 3.2 Thermal Resistance of Package |
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