4

SAM0617-031405

ESS Technology, Inc.

ES7020 PRODUCT BRIEF

PINOUT (A14 TO N26)

The pinout diagram for the clock and JTAG interfaces, and for

part of the decoder video, encoder input, PLL, RISC, and

encoder SDRAM interfaces of the ES7020, appears in Figure 3.

The pound symbol (#) denotes an active-low signal. The rest of

the ES7020 device pinout appears in Figure 1, Figure 2 and

Figure 4.

Figure 3 ES7020 Device Pinout (A14 to N26)

26

25

24

23

22

21

20

19

18

17

K

J

H

G

F

E

D

C

B

A

N

M

L

16

15

14

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

16

15

14

N

M

L

LA20

LA21

AVSS_

VSS

PLL

LWRHL#

VID_XI

AVSS_

LWRLL#

PLL

LCS3#

LCS2#

VID_XO

VDD1.5

LCS1#

LCS0#

PCLK

VSYNC#

QSCN

HSYNC#

TRST

VSS

TCK

TMS

OSC32

PSTOP

TDO

OUT

TMC1

VDD3.3

RSVD

TDI

AIMCLK

OSC32

CS2

TMC2

IN

RSVD

VSS

VBAT

AIBD

VSS

VSS

VSS

VSS

AILRCK

AIBCK

RESET#

VIFLD

VI

VI

HSYNC#

VSYNC#

VIN1

VIN0

VIN2

VIN3

VIN4

VIN5

VDD3.3

VIN6

VIN7

VICLK

MDQM

MWE#

MCAS#

MRAS#

MCS#

MCKE

MEMCLK

MD0

VSS

MD1

MD2

MD3

MD4

MD5

MD6

MD7

VDD1.5

MD8

MD9

MD10

MD11

MD12

MD13

VDD1.5

MD17

MD16

MD15

MD14

AVDD_

PLL

AVDD_

PLL

AVSS_

PLL

AVSS_

PLL