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P89CV51RB2FBC bảng dữ liệu(PDF) 45 Page - NXP Semiconductors |
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P89CV51RB2FBC bảng dữ liệu(HTML) 45 Page - NXP Semiconductors |
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45 / 73 page ![]() P89CV51RB2_RC2_RD2_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 5 October 2007 45 of 73 NXP Semiconductors P89CV51RB2/RC2/RD2 80C51 with 1 kB RAM, SPI 6.9.1 PCA capture mode To use one of the PCA modules in the Capture mode (Figure 21), either one or both of the CCAPM bits CAPN and CAPP for that module must be set. The external CEX input for the module (on port 1) is sampled for a transition. When a valid transition occurs, the PCA hardware loads the value of the PCA counter registers (CH and CL) into the module’s capture registers (CCAPnL and CCAPnH). Table 37. CCAPMn - PCA modules compare/capture register (address CCAPM0 DAH, CCAPM1 DBH, CCAPM2 DCH, CCAPM3 DDH, CCAPM4 DEH) bit allocation Not bit addressable; reset value: 00H. Bit 7 6 5 4 3 2 1 0 Symbol - ECOMn CAPPn CAPNn MATn TOGn PWMn ECCFn Table 38. CCAPMn - PCA modules compare/capture register (address CCAPM0 DAH, CCAPM1 DBH, CCAPM2 DCH, CCAPM3 DDH, CCAPM4 DEH) bit description Bit Symbol Description 7 - Reserved for future use. Should be set to 0 by user programs. 6 ECOMn Enable Comparator. ECOMn = 1 enables the comparator function. 5 CAPPn Capture Positive, CAPPn = 1 enables positive edge capture. 4 CAPNn Capture Negative, CAPNn = 1 enables negative edge capture. 3 MATn Match. When MATn = 1 a match of the PCA counter with this module’s compare/capture register causes the CCFn bit in CCON to be set, flagging an interrupt. 2 TOGn Toggle. When TOGn = 1, a match of the PCA counter with this module’s compare/capture register causes the CEXn pin to toggle. 1 PWMn Pulse Width Modulation mode. PWMn = 1 enables the CEXn pin to be used as a pulse-width modulated output. 0 ECCFn Enable CCF interrupt. Enables compare/capture flag CCFn in the CCON register to generate an interrupt. Table 39. PCA module modes (CCAPMn register) ECOMn CAPPn CAPNn MATn TOGn PWMn ECCFn Module function 0 0 0 0 0 0 0 no operation X 1 0 0 0 0 X 16-bit capture by a positive-edge trigger on CEXn X 0 1 0 0 0 X 16-bit capture by a negative-edge trigger on CEXn X 1 1 0 0 0 X 16-bit capture by any transition on CEXn 1 0 0 1 0 0 X 16-bit software timer 1 0 0 1 1 0 X 16-bit high-speed output 1 0 0 0 0 1 0 8-bit PWM 1 0 0 1 X 0 X watchdog timer |
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