MPC8280 datasheet(973/1386 Pages) FREESCALE

973 / 1386 page

ATM Controller and AAL0, AAL1, and AAL5

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

31-13

Equation D yields the number of slots the user writes to the channel’s TCT[BT].

31.3.5.3.2

Handling the Cell Loss Priority (CLP)—VBR Type 1 and 2

The MPC8280 supports two ways to schedule VBR traffic based on the cell loss priority (CLP). When

TCTE[VBR2] is cleared, CLP

0+1 cells are scheduled by PCR or SCR according to the GCRA state. When

TCTE[VBR2] is set, CLP

0 cells are still scheduled by PCR or SCR according to the GCRA state, but CLP1

cells are always scheduled by PCR. See Section 31.10.2.3.6, “VBR Protocol-Specific TCTE.”

31.3.5.4

Peak and Minimum Cell Rate Traffic Type (UBR+)

To support UBR+ channels, the APC schedules transmission according to PCR and MCR. For each

priority level, the APC maintains a parameter that monitors the traffic load measured as the time-slot delay

between the service pointer (pointing to the current time slot waiting transmission) and a real-time slot

pointer. If the transmission delay is greater than MDA (maximum delay allowed), the APC begins

scheduling channels according to the MCR parameter. If the delay, however, drops below MDA, the APC

again schedules channels according to the PCR. Note that in order to guarantee a minimum cell rate for

UBR+ channels, there must be enough bandwidth to simultaneously send all possible channels at the

MCR. See Section 31.10.2.3.7, “UBR+ Protocol-Specific TCTE.”

31.3.6

Determining the Priority of an ATM Channel

The priority mechanism is implemented by adding priority table levels, which point to separate scheduling

tables; see Section 31.10.4, “APC Data Structure.” The APC flow control services the APC_LEVEL1 slots

first. If there are no cells to send, the APC goes to the next priority level. The APC has up to eight priority

levels with APC_LEVEL8 being the lowest. The user specifies the priority of an ATM channel when

issuing the ATM TRANSMIT command; see Section 31.14, “ATM Transmit Command.”

The real-time channels, CBR and VBR-RT, should be inserted in APC_LEVEL1; non-real-time channels,

VBR-NRT, ABR, and UBR should be inserted in lower priority levels.

31.4

VCI/VPI Address Lookup Mechanism

The MPC8280 supports two ways to look up addresses for incoming cells:

•

External CAM lookup

•

Address compression

Writing to GMODE[ALM] (address-lookup-mechanism bit) in the parameter RAM selects the

mechanism. Both mechanisms are described in the following sections.

BT [slots] = (MBS[cells] - 2)

× (SCR[slots] - PCR[slots]) + SCR[slots]

(D)

= (1000 - 2)

× ((9+185/256) - (3+62/256)) + (9 +185/256)

= 6477

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