MPC8280 datasheet(962/1386 Pages) FREESCALE

962 / 1386 page

ATM Controller and AAL0, AAL1, and AAL5

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

31-2

Freescale Semiconductor

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Up to 255 active VCs internally, and up to 64K VCs using external memory

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TM 4.0 CBR, VBR, UBR, UBR+ traffic types

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VBR type 1 and 2 traffic using leaky buckets (GCRA)

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TM 4.0 ABR flow control (EFCI and ER)

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Idle/unassign cells screening/transmission option

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External and internal rate transmit modes

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Special mode for ATM-to-TDM or ATM-to-ATM data forwarding

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CLP and congestion indication marking

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User-defined cells up to 65 bytes

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Separate TxBD and RxBD tables for each virtual channel (VC)

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Special mode of global free buffer pools for dynamic and efficient memory allocation with early

packet discard (EPD) support

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Interrupt report per channel using four priority interrupt queues

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Compliant with ATMF UNI 4.0 and ITU specification

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AAL5 cell format

— Reassembly

– Reassemble PDU directly to external memory

– CRC32 check

– CLP and congestion report

– CPCS_UU, CPI, and length check

– Abort message report

— Segmentation

– Segment PDU directly from external memory

– Performs PDU padding

– CRC32 generation

– Automatic last cell marking

– Automatic CPCS_UU, CPI, and length insertion

– Abort message option

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AAL1 cell format

— Reassembly

– Reassemble PDU directly to external memory

– Support for partially filled cells (configurable on a per-VC basis)

– Sequence number check

– Sequence number protection (CRC-3 and parity) check

— Segmentation

– Segment PDU directly from external memory

– Partially filled cells support (configurable on a per-VC basis)

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