MPC8280 datasheet(848/1386 Pages) FREESCALE

848 / 1386 page

Universal Serial Bus Controller

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

27-32

Freescale Semiconductor

27.7 USB CP Commands

The following transmit commands are issued to the CP command register (CPCR). Refer to

Section 14.4.1, “CP Command Register (CPCR).”

27.7.1

STOP Tx Command

This command disables the transmission of data on the selected endpoint. After issuing the command the

corresponding Endpoint FIFO should be flushed. No further transmissions will take place until the Restart

Tx Command is issued.

0x04

0–31

Data Buffer Pointer

The data buffer pointer. The buffer may reside in either internal or external

memory.

For OUT/SETUP transactions, this points to the buffer containing the data

packet to transmit. It may have any alignment. For IN transactions, this points to

the buffer into which the data packet should be received, The pointer must be

divisible by 4.

0x08

0–1

TOK

Token Type

This field determines the type of token to be transmitted and the type of

transaction.

00 SETUP

01 OUT

10 IN

11 Reserved

—

Reserved, should be cleared.

ISO

Isochronous

This bit indicates that the transaction is isochronous, so no handshake is

required.

0 Bulk/Control/Interrupt. The handshake packet is automatically expected or

generated by the USB Host Controller.

1 Isochronous. No handshake packets are expected or generated.

This bit actually controls the value that is written to USEP1[TM] before

processing this transaction.

—

Reserved, should be cleared.

5–8

ENDP

Endpoint

This field indicates the endpoint number to be included in the token.

9–15

ADDR

Address

This field indicates the device address to be included in the token.

0x0A

0–15

—

Reserved, should be cleared.

1 Written by the USB controller after it finishes sending or receiving the associated data buffer.

Table 27-19. USB Host TrBD Fields (continued)

Offset

Bit

Name

Description

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