STDS75 datasheet(14/37 Pages) STMICROELECTRONICS

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Operation

STDS75

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2.5

Fault tolerance

For both Comparator and Interrupt modes, the alarm “fault tolerance” setting plays a role in

determining when the OS/INT output will be activated. Fault tolerance refers to the number

of consecutive times an error condition must be detected before the user is notified. Higher

fault tolerance settings can help eliminate false alarms caused by noise in the system. The

alarm fault tolerance is controlled by the bits (Bits 4 and 3) in the Configuration Register.

These bits can be used to set the fault tolerance to 1, 2, 4, or 6 as shown in Table 2. At

power-up, these bits both default to logic '0.'

2.6

Shutdown mode

For power-sensitive applications, the STDS75 offers a low-power shutdown mode. The SD

Bit in the Configuration register controls shutdown mode. When SD is changed to login '1,'

the conversion in progress will be completed and the result stored in the temperature

will be cleared if the thermostat is operating in Interrupt mode and the OS/INT will remain

unchanged in Comparator mode. The 2-wire interface remains operational in shutdown

mode, and writing a '0' to the SD Bit returns the STDS75 to normal operation.

Table 2.

Fault tolerance setting

FT1

FT0

STDS75 (Consecutive Faults)

Comments

Power-up default

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