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SC1480AEVB bảng dữ liệu(PDF) 11 Page - Semtech Corporation

tên linh kiện SC1480AEVB
Giải thích chi tiết về linh kiện  DDR and DDR Memory VTT power Supply Controller
PDF  23 Pages
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nhà sản xuất  SEMTECH [Semtech Corporation]
Trang chủ  http://www.semtech.com
Logo SEMTECH - Semtech Corporation

SC1480AEVB bảng dữ liệu(HTML) 11 Page - Semtech Corporation

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11
 2003 Semtech Corp.
www.semtech.com
SC1480A
POWER MANAGEMENT
Applications Information (Cont.)
() ()H
I
5
.
0
t
V
V
L
OUT
)
MIN
(
VBAT
_
ON
OUT
)
MIN
(
BAT
)
MIN
(
VBAT
•
•
−
=
and
() () H
I
5
.
0
t
V
V
L
OUT
)
MAX
(
VBAT
_
ON
OUT
)
MAX
(
BAT
)
MAX
(
VBAT
•
•
−
=
.or our DDR2 VTT example:
L
VBAT(MIN) = 1.6µH and LVBAT(MAX) = 2.1µH
We will select an inductor value of 2.2µH to reduce the
ripple current, which can be calculated as follows:
()
P
P
)
MIN
(
VBAT
_
ON
OUT
)
MIN
(
BAT
)
MIN
(
VBAT
_
RIPPLE
A
L
t
V
V
I
−
•
−
=
and
()
P
P
)
MAX
(
VBAT
_
ON
OUT
)
MAX
(
BAT
)
MAX
(
VBAT
_
RIPPLE
A
L
t
V
V
I
−
•
−
=
.or our DDR2 VTT example:
I
RIPPLE_VBAT(MIN) = 1.06AP-P and IRIPPLE_VBAT(MAX) = 1.4AP-P
.rom this we can calculate the minimum inductor
current rating for normal operation:
)
MIN
(
)
MAX
(
VBAT
_
RIPPLE
)
MAX
(
OUT
)
MIN
(
INDUCTOR
A
2
I
I
I
+
=
.or our DDR2 VTT example:
I
INDUCTOR(MIN) = 3.7A(MIN)
Next we will calculate the maximum output capacitor
equivalent series resistance (ESR). This is determined by
calculating the remaining static and transient tolerance
allowances. Then the maximum ESR is the smaller of the
calculated static ESR (R
ESR_ST(MAX)) and transient ESR
(R
ESR_TR(MAX)):
()
Ohms
I
2
ERR
ERR
R
)
MAX
(
VBAT
_
RIPPLE
DC
ST
)
MAX
(
ST
_
ESR
•
−
=
Where ERR
ST is the static output tolerance and ERRDC is
the DC error. The DC error will be 1% plus the tolerance
of the feedback resistors, thus 2% total for 1%
feedback resistors.
.or our DDR2 VTT example:
ERR
ST = 36mV and ERRDC = 18mV, therefore
R
ESR_ST(MAX) = 26mΩ
()
Ohms
2
I
I
ERR
ERR
R
)
MAX
(
VBAT
_
RIPPLE
OUT
DC
TR
)
MAX
(
TR
_
ESR


+
−
=
Where ERR
TR is the transient output tolerance. Note that
this calculation assumes that the worst case load
transient is full load. .or half of full load, divide the I
OUT
term by 2.
.or our DDR2 VTT example:
ERR
TR = 72mV and ERRDC = 18mV, therefore
R
ESR_TR(MAX) = 14.6mΩ for a 3A load transient
We will select a value of 15mΩ maximum for our
design.
Note that for constant-on converters there is a minimum
ESR requirement for stability which can be calculated as
follows:
SW
OUT
)
MIN
(
ESR
f
C
2
3
R
•
•
π
•
=
This criteria should be checked once the output
capacitance has been determined.
Now that we know the output ESR we can calculate the
output ripple voltage:
P
P
)
MAX
(
VBAT
_
RIPPLE
ESR
)
MAX
(
VBAT
_
RIPPLE
V
I
R
V
−
•
=
and
P
P
)
MIN
(
VBAT
_
RIPPLE
ESR
)
MIN
(
VBAT
_
RIPPLE
V
I
R
V
−
•
=
.or our DDR2 VTT example:



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