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PPC440GP-3CC400CZ bảng dữ liệu(PDF) 60 Page - Applied Micro Circuits Corporation |
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PPC440GP-3CC400CZ bảng dữ liệu(HTML) 60 Page - Applied Micro Circuits Corporation |
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60 / 83 page ![]() 440GP – Power PC 440GP Embedded Processor 60 AMCC Revision 1.07 – October 4, 2007 Data Sheet Test Conditions Clock timing and switching characteristics are specified in accordance with operating conditions shown in the table “Recommended DC Operating Conditions.” AC specifications are characterized with VDD = 1.8V, TC = rated temperature and a 50pF test load as shown in the figure to the right. Timing Waveform Clocking Specifications Symbol Parameter Minimum Maximum Units Notes SysClk Input FC Frequency 33.33 66.66 MHz TC Period 15 30 ns TCS Edge stability (cycle-to-cycle jitter) – ±0.15 ns TCH High time 40% of nominal period 60% of nominal period ns TCL Low time 40% of nominal period 60% of nominal period ns Note:Input slew rate ≥ 1V/ns PLL VCO FC Frequency 500 1000 MHz TC Period 1 2 ns Processor Clock (CPU Clock) FC Frequency – 500 MHz 1 TC Period 2 – ns MemClkOut FC Frequency 100 133.33 MHz TC Period 7.5 10 ns TCH High time 35% of nominal period 65% of nominal period ns Notes: 1. The maximum supported processor clock frequency for any part is specified in the part number (see “Ordering and PVR Information” on page 4). Output Pin 50pF C TCL TCH TC 2.0V 1.5V 0.8V |
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