PPC440EPX-SPAFFFTS datasheet(16/94 Pages) AMCC

16 / 94 page

440EPx – PPC440EPx Embedded Processor

Preliminary Data Sheet

AMCC Proprietary

Revision 1.26 – October 15, 2007

Serial Ports (UART)

Features include:

• Up to four ports in the following combinations:

– One 8-pin (UART0)

– Two 4-pin (UART0 and UART1)

– One 4-pin (UART0) and two 2-pin (UART1 and UART2)

– Four 2-pin (UART0, UART1, UART2, and UART3)

• Selectable internal or external serial clock to allow wide range of baud rates

• Register compatibility with NS16750 register set

• Complete status reporting capability

• Fully programmable serial-interface characteristics

• Supports DMA using internal DMA function on PLB3

IIC Bus Controller

Features include:

• Two IIC interfaces provided

• Support for Philips® Semiconductors I2C Specification, dated 1995

• Operation at 100kHz or 400kHz

•8-bit data

• 10- or 7-bit address

• Slave transmitter and receiver

• Master transmitter and receiver

• Multiple bus masters

• Two independent 4 x 1 byte data buffers

• Twelve memory-mapped, fully programmable configuration registers

• One programmable interrupt request signal

• Provides full management of all IIC bus protocols

• Programmable error recovery

• Includes an integrated bootstrap controller (BSC) that is multiplexed with the second IIC interface

Serial Peripheral Controller (SPI/SCP)

The Serial Peripheral Interface (also known as the Serial Communications Port) is a full-duplex, synchronous,

character-oriented (byte) port that allows the exchange of data with other serial devices. The SCP is a master on

the serial port supporting a 3-wire interface (receive, transmit, and clock), and is a slave on the OPB.

Features include:

• Three-wire serial port interface

• Full-duplex synchronous operation

• SCP bus master

• OPB bus slave

• Programmable clock rate divider

• Clock inversion

• Reverse data

• Local data loop back for test

Universal Serial Bus 2.0 (USB)

The USB 2.0 interface provides both device and host support. One interface provides host or device support and

operates through an internal PHY. The other interface provides device support only through the UTMI interface

with no internal PHY.

PPC440EPX-SPAFFFTS bảng dữ liệu(PDF) 16 Page - Applied Micro Circuits Corporation

PPC440EPX-SPAFFFTS bảng dữ liệu(HTML) 16 Page - Applied Micro Circuits Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94

bảng dữ liệu tải về

Link URL