PIC18F6X2X datasheet(189/386 Pages) MICROCHIP

189 / 386 page

 2003 Microchip Technology Inc.

Advance Information

DS39612A-page 187

PIC18F6X2X/8X2X

SSPCON2: MSSP CONTROL REGISTER 2 (I2C MODE)

R/W-0

GCEN

ACKSTAT

ACKDT

ACKEN

RCEN

PEN

RSEN

SEN

bit 7

bit 0

bit 7

GCEN: General Call Enable bit (Slave mode only)

= Enable interrupt when a general call address (0000h) is received in the SSPSR

= General call address disabled

bit 6

ACKSTAT: Acknowledge Status bit (Master Transmit mode only)

= Acknowledge was not received from slave

= Acknowledge was received from slave

bit 5

ACKDT: Acknowledge Data bit (Master Receive mode only)

= Not Acknowledge

= Acknowledge

Note:

Value that will be transmitted when the user initiates an Acknowledge sequence at

the end of a receive.

bit 4

ACKEN: Acknowledge Sequence Enable bit (Master Receive mode only)

= Initiate Acknowledge sequence on SDA and SCL pins, and transmit ACKDT data bit.

Automatically cleared by hardware.

= Acknowledge sequence IDLE

bit 3

RCEN: Receive Enable bit (Master mode only)

= Enables Receive mode for I2C

= Receive IDLE

bit 2

PEN: STOP Condition Enable bit (Master mode only)

= Initiate STOP condition on SDA and SCL pins. Automatically cleared by hardware.

= STOP condition IDLE

bit 1

RSEN: Repeated START Condition Enabled bit (Master mode only)

= Initiate Repeated START condition on SDA and SCL pins. Automatically cleared by

hardware.

= Repeated START condition IDLE

bit 0

SEN: START Condition Enabled/Stretch Enabled bit

In Master mode:

= Initiate START condition on SDA and SCL pins. Automatically cleared by hardware.

= START condition IDLE

In Slave mode:

= Clock stretching is enabled for both slave transmit and slave receive (stretch enabled)

= Clock stretching is disabled

Note:

For bits ACKEN, RCEN, PEN, RSEN, SEN: If the I2C module is not in the IDLE

mode, this bit may not be set (no spooling) and the SSPBUF may not be written (or

writes to the SSPBUF are disabled).

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

- n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

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