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ST72324BJ2 bảng dữ liệu(PDF) 171 Page - STMicroelectronics |
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ST72324BJ2 bảng dữ liệu(HTML) 171 Page - STMicroelectronics |
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171 / 188 page ![]() ST72324B Package characteristics 171/188 13.5 Thermal characteristics 13.6 Soldering information In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. Table 117. Thermal characteristics Symbol Ratings Value Unit RthJA Package thermal resistance (junction to ambient): LQFP44 10x10 LQFP32 7x7 DIP42 600mil SDIP32 200mil 52 70 55 50 °C/W PD Power dissipation(1) 1. The maximum power dissipation is obtained from the formula PD = (TJ -TA) / RthJA. The power dissipation of an application can be defined by the user with the formula: PD =PINT +PPORT where PINT is the chip internal power (IDD x VDD) and PPORT is the port power dissipation depending on the ports used in the application. 500 mW TJmax Maximum junction temperature(2) 2. The maximum chip-junction temperature is based on technology characteristics. 150 °C |
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