SRIX4K datasheet(19/50 Pages) STMICROELECTRONICS

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SRIX4K

Memory mapping

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4.4.1

OTP_Lock_Reg

The 8 bits, b31 to b24, of the System Area (block address 255) are used as OTP_Lock_Reg

bits in the SRIX4K. They control the Write access to the 9 EEPROM blocks with addresses

7 to 15 as follows:

–

When b24 is at 0, blocks 7 and 8 are Write-protected

–

When b25 is at 0, block 9 is Write-protected

–

When b26 is at 0, block 10 is Write-protected

–

When b27 is at 0, block 11 is Write-protected

–

When b28 is at 0, block 12 is Write-protected

–

When b29 is at 0, block 13 is Write-protected

–

When b30 is at 0, block 14 is Write-protected

–

When b31 is at 0, block 15 is Write-protected.

The OTP_Lock_Reg bits cannot be erased. Once Write-protected, EEPROM blocks behave

like ROM blocks and cannot be unprotected.

4.4.2

Fixed Chip_ID (Option)

The SRIX4K is provided with an anticollision feature based on a random 8-bit Chip_ID. Prior

to selecting an SRIX4K, an anticollision sequence has to be run to search for the Chip_ID of

the SRIX4K. This is a very flexible feature, however the searching loop requires time to run.

For some applications, much time could be saved by knowing the value of the SRIX4K

Chip_ID beforehand, so that the SRIX4K can be identified and selected directly without

having to run an anticollision sequence. This is why the SRIX4K was designed with an

optional mask setting used to program a fixed 8-bit Chip_ID to bits b7 to b0 of the system

area. When the fixed Chip_ID option is used, the random Chip_ID function is disabled.

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