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STM32F103C8 bảng dữ liệu(PDF) 42 Page - STMicroelectronics

tên linh kiện STM32F103C8
Giải thích chi tiết về linh kiện  Performance line, ARM-based 32-bit MCU with Flash, USB, CAN, seven 16-bit timers, two ADCs and nine communication interfaces
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STM32F103C8 bảng dữ liệu(HTML) 42 Page - STMicroelectronics

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Electrical characteristics
STM32F103xx
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5.3.11
Absolute maximum ratings (electrical sensitivity)
Based on three different tests (ESD, LU) using specific measurement methods, the device is
stressed in order to determine its performance in terms of electrical sensitivity.
Electrostatic discharge (ESD)
Electrostatic discharges (a positive then a negative pulse separated by 1 second) are
applied to the pins of each sample according to each pin combination. The sample size is
either 3 parts (cumulative mode) or 3 parts × (n + 1) supply pins (non-cumulative mode).
The human body model (HBM) can be simulated. The tests are compliant with JESD22-
A114A standard.
For more details, refer to the application note AN1181.
Static latch-up
Two complementary static tests are required on six parts to assess the latch-up
performance:
●
A supply overvoltage is applied to each power supply pin
●
A current injection is applied to each input, output and configurable I/O pin
These tests are compliant with EIA/JESD 78A IC latch-up standard.
Table 27.
ESD absolute maximum ratings(1)
1.
TBD stands for to be determined.
Symbol
Ratings
Conditions
Maximum value(2)
2.
Values based on characterization results, not tested in production.
Unit
VESD(HBM)
Electrostatic discharge voltage
(human body model)
TA = +25 °C
2000
V
VESD(CDM)
Electrostatic discharge voltage
(charge device model)
TBD
Table 28.
Electrical sensitivities
Symbol
Parameter
Conditions
Class
LU
Static latch-up class
TA = +105 °C
II level A



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