CYIS1SM0250-AA
Document Number: 38-05713 Rev. *B
Page 10 of 24
Shift Registers
The shift registers are located next to the pixel array and
contain as many outputs as the number of rows in the pixel
array. They are designed as "1-hot" registers, (YL and YR shift
register) each allowing selection of one row of pixels at a time.
A clock pulse moves the pointer one position down the register
resulting in the selection of every individual row for either reset
or for readout. The spatial offset between the two selected
rows determines the integration time. A synchronization pulse
to the shift registers loads the value from a preset register into
the shift register forcing the pointer to a predetermined
position. Windowing in the vertical (Y) direction is achieved by
presetting the registers to a row that is not the first row and by
clocking out only the required number of rows.
Column Amplifiers
All outputs from the pixels in a column are connected in parallel
to a column amplifier. This amplifier samples the output
voltage and the reset level of the pixel whose row is selected
at that moment and presents these voltage levels to the output
amplifier. As a result, the pixels are always reset immediately
after readout as part of the sample procedure and the
maximum integration time of a pixel is the time between two
read cycles.
Electronic Shutter
In a linescan integrating imager with electronic shutter, there
are two continuous processes of image gathering.
The first process resets lines in a progressive scan. At line
reset, all the pixels in a line are drained from any photo
charges collected since their last reset or readout. After reset,
a new exposure cycle starts for that particular line.
The second process is the actual readout, which also happens
in an equally fast linewise progressive scan.
During readout, the photo charges collected since the
previous reset are converted into an output voltage. This is
then passed on pixel by pixel to the imager's pixel serial output
and ADC. Readout is destructive, meaning the accumulation
of charges from successive exposure phases is not possible
in the present architecture.
The STAR250 has two Y- shift registers; YL and YR. One is
used for readout of a line (YL) and the other is used to reset a
line (YR). The integration time is equal to the time between the
last reset and the readout of that line, see Figure 8. The
integration time is thus equal to:
Integration time = (Nr. Lines * (RBT + pixel period * Nr. Pixels))
with:
• Nr. Lines: Number of Lines between readout and reset (Y).
• Nr. Pixels: Number of pixels read out each line (X).
• RBT: Row Blanking Time = 3.2
µs (typical).
• Pixel period: 1/8 MHz = 125 ns (typical).
Figure 8. Electronic Shutter
Reset line
Read line
x
y
x
y
Time axis
Line number
Reset sequence
Frame time
Integration time
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