PM7366-PI datasheet(227/286 Pages) PMC

227 / 286 page

RELEASED

PM7366 FREEDM-8

DATA SHEET

PMC-1970930

ISSUE 4

FRAME ENGINE AND DATA LINK MANAGER

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

214

Bit

Type

Function

Default

Bit 31 to

Bit 16

Unused

XXXXH

Bit 15

C2[15]

Bit 14

C2[14]

Bit 13

C2[13]

Bit 12

C2[12]

Bit 11

C2[11]

Bit 10

C2[10]

Bit 9

C2[9]

Bit 8

C2[8]

Bit 7

C2[7]

Bit 6

C2[6]

Bit 5

C2[5]

Bit 4

C2[4]

Bit 3

C2[3]

Bit 2

C2[2]

Bit 1

C2[1]

Bit 0

C2[0]

This register reports the number events, selected by the FREEDM-8 Master Performance Monitor

Control register, that occurred in the previous accumulation interval.

Note

This register is not byte addressable. Writing to this register modifies all the bits in the register.

Byte selection using byte enable signals (CBEB[3:0]) are not implemented. However, when all

four byte enables are negated, no access is made to this register.

C2[15:0]:

The C2[15:0] bits reports the number of selected events that have been detected since the

last time this register was polled. This register is polled by writing to the FREEDM-8 Master

Clock / BERT Activity Monitor and Accumulation Trigger register. The write access transfers

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