ADC3908CSSS datasheet(31/47 Pages) TI

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8 Application Information Disclaimer

Note

Information in the following applications sections is not part of the TI component specification,

and TI does not warrant its accuracy or completeness. TI’s customers are responsible for

determining suitability of components for their purposes, as well as validating and testing their design

implementation to confirm system functionality.

8.1 Typical Application

A digitizer is a typical time domain application for the ADC3908D125. The front end circuitry is similar to several

other systems such as oscilloscopes, distance meters, laser scanners or other hand held test equipment.

Control

AIN

ADC

1.25V

VCM

DCLK

Dig I/F

FPGA

1.2V REF

1 k

AVDD

Device Clock

AMP

CVCM

Low Pass Filter

AMP

BIN

CLK

1 k

Low Pass Filter

Figure 8-1. Typical configuration for a time domain digitizer

8.1.1 Design Requirements

Time domain applications cover a wide range of frequencies from low input frequencies at or near DC in the 1st

Nyquist zone. If a low input frequency is supported, then the input has to be DC coupled and the ADC driven by

a fully differential amplifier (FDA).

The ADC performance is highly dependent on the quality of the external clock source. A higher ADC sampling

rate is desirable to relax the external anti-aliasing filter. For optimum performance, the analog inputs must be

driven differentially.

Table 8-1. Design key care abouts

FEATURE

DESCRIPTION

Signal Bandwidth

DC to 30MHz

Input Driver

Single ended to differential signal conversion and DC coupling

Clock Source

External clock with low jitter

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ADC3908D025, ADC3908D065, ADC3908D125

ADC3908S025, ADC3908S065, ADC3908S125

SBASAU9 – OCTOBER 2024

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