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STAC9752 bảng dữ liệu(PDF) 67 Page - Integrated Device Technology |
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STAC9752 bảng dữ liệu(HTML) 67 Page - Integrated Device Technology |
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67 / 95 page ![]() STAC9752/9753 TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING IDT™ 67 STAC9752/9753 REV 3.3 1206 TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING 8.2.8. GPIO Pin Mask Register (52h) Default: 0000h 8.2.9. GPIO Pin Status Register (54h) Default: 0000h D15 D14 D13 D12 D11 D10 D9 D8 RESERVED D7 D6 D5 D4 D3 D2 D1 D0 RESERVED GW1 (GPIO1) GW0 (GPIO0) Bit(s) Access Reset Value Name Description 15:2 Read Only 0 RESERVED Bit not used, should read back 0 1 Read / Write 0 GW1 0 = GPIO1 interrupt not passed to GPIO_INT slot 12. 1 = GPIO1 interrupt is passed to GPIO_INT slot 12. 0 Read / Write 0 GW0 0 = GPIO0 interrupt not passed to GPIO_INT slot 12. 1 = GPIO0 interrupt is passed to GPIO_INT slot 12. D15 D14 D13 D12 D11 D10 D9 D8 RESERVED D7 D6 D5 D4 D3 D2 D1 D0 RESERVED GI1 (GPIO1) GI0 (GPIO0) Bit(s) Access Reset Value Name Description 15:2 Read Only 0 RESERVED Bits not used, should read back 0 1 Read / Write x GI1 When GPIO1 is configured as output and Register h74 bit[0] = 0 (default), the value of this register will be placed on the GPIO1 pad. When GPIO1 is configured as output and Register h74 bit[0] =1, the GPIO1 pad will get its value from slot12. When GPIO1 is configured as input and configured as a sticky bit, writing a 1 does nothing, writing a 0 clears this bit. When GPIO1 is configured as input, this register reflects the value on the GPIO1 pad after interpretation of the polarity and sticky configurations. 0 Read / Write x GI0 When GPIO0 is configured as output and Register h74 bit[0] = 0 (default), the value of this register will be placed on the GPIO0 pad. When GPIO0 is configured as output and Register h74 bit[0] =1, the GPIO0 pad will get its value from slot12. When GPIO0 is configured as input and configured as a sticky bit, writing a 1 does nothing, writing a 0 clears this bit. When GPIO0 is configured as input, this register reflects the value on the GPIO0 pad after interpretation of the polarity and sticky configurations. |
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