M65KG512AB8W9 datasheet(45/54 Pages) STMICROELECTRONICS

tên linh kiện	M65KG512AB8W9

Giải thích chi tiết về linh kiện	512Mbit (4 banks x 8 Mb x 16) 1.8 V supply, DDR low power SDRAM

PDF	54 Pages

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nhà sản xuất	STMICROELECTRONICS [STMicroelectronics]

Trang chủ	http://www.st.com

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M65KG526AB

DC and ac parameters

45/54

Figure 24.

Write followed by Read (Write completed)

If the Read operation is performed to the same bank and row than the Write operation, the READ command should be

performed tWRD after the WRIT command to complete the Write operation.

If the Read operation is performed to the same bank but to a different row, the bank must be precharged tWPD after the

Write operation. tRP after the Precharge command, issue the ACT command. The READ command can then be issued

tRCD after the ACT command.

If the Read operation is performed to a different bank and to an active row, the sequence is identical to the one described in

Note 1

If the Read operation is performed to a different bank and to an idle row, the bank must be precharged independently from

the Write operation. tRP after the Precharge command, issue the ACT command. The WRIT command can then be issued

tRCD after the ACT command.

Command

DI1

UDQS,

LDQS

DQ0-DQ15

WRIT

NOP

tWRDmin (3)

DI0

ai10838b

READ

NOP

Note: 1. Burst Length = 4

2. CAS Latency = 3 (CL)

3. tWRD = BL/2 + 2 clock cycles

UDQM,

LDQM

DO0 DO1 DO2

Data Input

Data Output

DI2 DI3

DO3

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