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ADL8122ACPZN-R7 bảng dữ liệu(PDF) 1 Page - Analog Devices |
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ADL8122ACPZN-R7 bảng dữ liệu(HTML) 1 Page - Analog Devices |
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1 / 28 page ![]() Data Sheet ADL8122 10 kHz to 10 GHz, Wideband, Low Noise Amplifier Rev. 0 DOCUMENT FEEDBACK TECHNICAL SUPPORT Information furnished by Analog Devices is believed to be accurate and reliable "as is". However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. FEATURES ► Single positive supply (self biased) ► Resistor-programmable bias setting ► Positive gain slope vs. frequency ► Wideband operation: 10 kHz to 10 GHz ► Extended operating temperature range: −55°C to +125°C ► RoHS-compliant, 2 mm × 2 mm, 8-lead LFCSP APPLICATIONS ► Telecommunications ► Instrumentation ► Radar ► Electronic warfare GENERAL DESCRIPTION The ADL8122 is a wideband low noise amplifier (LNA) that oper- ates from 10 kHz to 10 GHz. Typical gain and noise figure are 17 dB and 2 dB, respectively, from 2 GHz to 6 GHz. Output power for 1 dB compression (OP1dB), output third-order intercept (OIP3), and output second-order intercept (OIP2) are 20 dBm, 33.5 dBm, and 37 dBm, respectively, from 2 GHz to 6 GHz. The nominal quiescent current (IDQ), which can be adjusted, is 95 mA from a 5 V supply voltage (VDD). The internally matched, DC-coupled RF input and output pins require external AC coupling capacitors along with a bias inductor on RFOUT. In addition, the RF input is biased through an external inductor connected between the VBIAS pin and the RFIN pin. The ADL8122 is fabricated on a pseudomorphic, high electron mobility transistor (pHEMT) process. The device is housed in a RoHS-compliant, 2 mm × 2 mm, 8-lead LFCSP and is specified for operation from −55°C to +125°C. FUNCTIONAL BLOCK DIAGRAM Figure 1. Functional Block Diagram |
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