ADL8122ACPZN-R7 datasheet(27/28 Pages) AD

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Data Sheet

ADL8122

APPLICATIONS INFORMATION

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Rev. 0 | 27 of 28

RECOMMENDED POWER MANAGEMENT

CIRCUIT

Figure 100 shows a recommended power management circuit for

the ADL8122. The LT8607 step-down regulator is used to step

down a 12 V rail to 6.77 V, which is then applied to the LT3042 low

dropout (LDO) linear regulator to generate a low noise 5 V output.

Even though the circuit shown in Figure 100 has an input voltage

(VIN) of 12 V, the input range to the LT8607 can be as high as 42 V.

The 6.77 V regulator output of the LT8607 is set by the R2 and R3

resistors, according to the following equation:

R2 = R3((VOUT/0.778 V) – 1), where VOUT is the output voltage.

The switching frequency (fSW) is set to 2 MHz by the 18.2 kΩ

resistor (R1) on the RT pin. The LT8607 data sheet provides a

table of resistor values that can be used to select other switching

frequencies ranging from 0.2 MHz to 2.2 MHz.

The output voltage of the LT3042 is set by the R4 resistor connect-

ed to the SET pin, according to the following equation:

VOUT = 100 μA × R4

The resistors on the PGFB pins of the LT3042 are chosen to

trigger the power-good (PG) signal when the output is just under

95% of the target voltage of 5 V. The output of the LT3042 has

1% initial tolerance and another 1% variation over temperature.

The PGFB tolerance is roughly 3% over temperature, and adding

resistors results in a bit more (5%). Therefore, putting 5% between

the output and PGFB works well. In addition, the PG open-collector

is pulled up to the 5 V output to give a convenient 0 V to 5 V

voltage range. Table 11 provides the recommended resistor values

for operation at 6 V to 3 V.

Table 11. Recommended Resistor Values for Operating at 6 V to 3 V

LDO VOUT (V)

R4 (kΩ)

R7 (kΩ)

R8 (kΩ)

60.4

620

30.1

49.9

442

30.1

40.2

301

30.1

225

30.1

Figure 100. Recommended Power Management Circuit

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