TUSB4020BIPHPR datasheet(13/46 Pages) TI

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6.5 Programming

6.5.1 One-Time Programmable (OTP) Configuration

The TUSB4020BI allows device configuration through OTP non-volatile memory (OTP). The programming of the

OTP is supported using vendor-defined USB device requests. For details using the OTP features, contact a TI

representative.

Table 6-2 provides a list features which can be configured using the OTP. The bit field section in Table 6-2 shows

which features can be controlled by OTP ROM. The bits not listed in the table are not accessible by the OTP

ROM.

Table 6-2. OTP Configurable Features

CONFIGURATION REGISTER OFFSET

BIT FIELD

DESCRIPTION

REG_01h

[7:0]

Vendor ID LSB

REG_02h

[7:0]

Vendor ID MSB

REG_03h

[7:0]

Product ID LSB

REG_04h

[7:0]

Product ID MSB

REG_07h

[0]

Port removable configuration for downstream ports 1. OTP configuration is

inverse of rmbl[1:0], that is:

1 = Not removable

0 = Removable

REG_07h

[1]

Port removable configuration for downstream ports 2. OTP configuration is

inverse of rmbl[1:0], that is:

1 = Not removable

0 = Removable

REG_0Ah

[1]

Automode enable

REG_0Ah

[4]

High-current divider mode enable.

REG_F2h

[3:1]

USB power switch power-on delay.

6.5.2 I2C EEPROM Operation

The TUSB4020BI supports a single-controller, standard mode (100kbps) connection to a dedicated I2C

EEPROM when the I2C interface mode is enabled. In I2C mode, the TUSB4020BI reads the contents of the

EEPROM at bus address 1010000b using 7-bit addressing starting at address 0.

If the value of the EEPROM contents at byte 00h equals 55h, the TUSB4020BI loads the configuration registers

according to the EEPROM map. If the first byte is not 55h, the TUSB4020BI exits the I2C mode and continues

execution with the default values in the configuration registers. The hub does not connect on the upstream port

until the configuration is completed. If the TUSB4020BI detects an unprogrammed EEPROM (value other than

55h), the device enters programming mode and a programming endpoint within the hub is enabled.

Note, the bytes located above offset Ah are optional. The requirement for data in those addresses depends

on the options configured in the Device Configuration, Phy Custom Configuration, and Device Configuration 2

registers.

For details on I2C operation, refer to the UM10204 I2C-bus Specification and User Manual.

6.5.3 SMBus Target Operation

When the SMBus interface mode is enabled, the TUSB4020BI supports read block and write block protocols as

a target-only SMBus device.

The TUSB4020BI target address is 1000 1xyz, where:

• x is the state of GANGED/SMBA2/HS_UP terminal at reset

• y is the state of FULLPWRMGMTz/SMBA1 terminal at reset

• z is the read/write bit; 1 = read access, 0 = write access.

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TUSB4020BI

SLLSEI0E – JULY 2015 – REVISED JULY 2024

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